Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6803797 | System and method for extending delay-locked loop frequency application range | — | 2004-10-12 |
| 5487133 | Distance calculating neural network classifier chip and system | Mark A. Holler, Jay M. Diamond, Siang-Chun The, Umberto Santoni, Kenneth R. Buckmann | 1996-01-23 |
| 5128895 | Method for programming a virtual ground EPROM cell including slow ramping of the column line voltage | — | 1992-07-07 |
| 5040134 | Neural network employing leveled summing scheme with blocked array | — | 1991-08-13 |
| 5027321 | Apparatus and method for improved reading/programming of virtual ground EPROM arrays | — | 1991-06-25 |
| 4999525 | Exclusive-or cell for pattern matching employing floating gate devices | Herman A. Castro | 1991-03-12 |
| 4992980 | Novel architecture for virtual ground high-density EPROMS | Gregory E. Atwood, Lubin Y. Gee | 1991-02-12 |
| 4760349 | CMOS analog standard cell arrays using linear transconductance elements | Rolf Schaumann | 1988-07-26 |