Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11934797 | Mechanism to perform single precision floating point extended math operations | Shashank Lakshminarayana, Subramaniam Maiyuran | 2024-03-19 |
| 11593069 | Use of a single instruction set architecture (ISA) instruction for vector normalization | Supratim Pal, Shashank Lakshminarayana, Subramaniam Maiyuran | 2023-02-28 |
| 11574382 | Programmable re-order buffer for decompression | Abhishek R. Appu, Eric G. Liskay, Prasoonkumar Surti, Sudhakar Kamma, Karthik Vaidyanathan +5 more | 2023-02-07 |
| 11157238 | Use of a single instruction set architecture (ISA) instruction for vector normalization | Supratim Pal, Shashank Lakshminarayana, Subramaniam Maiyuran | 2021-10-26 |
| 11113783 | Programmable re-order buffer for decompression | Abhishek R. Appu, Eric G. Liskay, Prasoonkumar Surti, Sudhakar Kamma, Karthik Vaidyanathan +5 more | 2021-09-07 |