CO

Clemens Ostermaier

IA Infineon Technologies Austria Ag: 32 patents #26 of 1,126Top 3%
Overall (All Time): #111,994 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDate
12159918 Group III nitride-based transistor device Oliver Haeberlen, Gerhard Prechtl, Manuel Stabentheiner 2024-12-03
11557670 Type III-V semiconductor device with improved leakage Christian Koller, Ingo Daumiller, Lauri Knuuttila 2023-01-17
11349012 Group III nitride-based transistor device and method of fabricating a gate structure for a group III nitride-based transistor device Oliver Haeberlen, Gerhard Prechtl, Manuel Stabentheiner 2022-05-31
11114554 High-electron-mobility transistor having a buried field plate Gerhard Prechtl, Oliver Häberlen 2021-09-07
10600710 Semiconductor device Gerhard Prechtl, Oliver Häberlen 2020-03-24
10304923 Method of forming a vertical potential short in a periphery region of a III-nitride stack for preventing lateral leakage Gerhard Prechtl, Oliver Häberlen 2019-05-28
10199216 Semiconductor wafer and method Gerhard Prechtl, Oliver Haeberlen 2019-02-05
10177061 Semiconductor device Gerhard Prechtl, Oliver Haeberlen 2019-01-08
10126355 Semiconductor probe test card with integrated hall measurement features Juergen Bostjancic, Gerhard Raczynski, David Kammerlander, Gerhard Prechtl 2018-11-13
10128133 Method of conditioning an etch chamber for contaminant free etching of a semiconductor device Andreas Haghofer 2018-11-13
10090406 Non-planar normally off compound semiconductor device Gerhard Prechtl, Oliver Haeberlen 2018-10-02
10038085 High electron mobility transistor with carrier injection mitigation gate structure Gilberto Curatola, Oliver Haeberlen, Gerhard Prechtl 2018-07-31
10038051 Vertical potential short in the periphery region of a III-nitride stack for preventing lateral leakage Gerhard Prechtl, Oliver Häberlen 2018-07-31
9947600 Semiconductor structure having a test structure formed in a group III nitride layer Franz Heider, Bernhard Brunner 2018-04-17
9847394 Semiconductor device Gerhard Prechtl, Oliver Haeberlen 2017-12-19
9837520 Group III-nitride-based enhancement mode transistor having a multi-heterojunction fin structure Gerhard Prechtl, Oliver Häberlen 2017-12-05
9837522 III-nitride bidirectional device Gerhard Prechtl, Oliver Haeberlen 2017-12-05
9728470 Semiconductor structure and methods Franz Heider, Bernhard Brunner 2017-08-08
9728630 High-electron-mobility transistor having a buried field plate Gerhard Prechtl, Oliver Haeberlen 2017-08-08
9666705 Contact structures for compound semiconductor devices Gerhard Prechtl, Oliver Häberlen, Gianmauro Pozzovivo 2017-05-30
9647104 Group III-nitride-based enhancement mode transistor having a heterojunction fin structure Gerhard Prechtl, Oliver Haeberlen 2017-05-09
9590048 Electronic device Gerhard Prechtl, Oliver Häberlen 2017-03-07
9515162 Surface treatment of semiconductor substrate using free radical state fluorine particles Maria Reiner, Peter Lagger, Gerhard Prechtl, Oliver Haeberlen, Josef Schellander +2 more 2016-12-06
9412834 Method of manufacturing HEMTs with an integrated Schottky diode Gerhard Prechtl, Oliver Haeberlen 2016-08-09
9349829 Method of manufacturing a multi-channel HEMT Gerhard Prechtl, Oliver Haeberlen, Hans Peter Felsl 2016-05-24