Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8670270 | Method of operating phase-change memory | Jan Otterstedt, Thomas Nirschl, Christian Peters, Wolf Allers, Michael Sommer | 2014-03-11 |
| 8502276 | Compact memory arrays | Jan Otterstedt, Thomas Nirschl, Wolf Allers | 2013-08-06 |
| 8437175 | System and method for level shifter | Thomas Nirschl, Jan Otterstedt, Wolf Allers | 2013-05-07 |
| 8344429 | Compact memory arrays | Jan Otterstedt, Thomas Nirschl, Wolf Allers | 2013-01-01 |
| 8327062 | Memory circuit and method for programming in parallel a number of bits within data blocks | Jan Otterstedt, Thomas Nirschl, Wolf Allers | 2012-12-04 |
| 8243520 | Non-volatile memory with predictive programming | Nigel Chan, Wolf Allers, Dimitri Lebedev, Jan Otterstedt, Christian Peters | 2012-08-14 |
| 8130558 | System and method for level shifter | Thomas Nirschl, Jan Otterstedt, Wolf Allers | 2012-03-06 |
| 8125821 | Method of operating phase-change memory | Jan Otterstedt, Thomas Nirschl, Christian Peters, Wolf Allers, Michael Sommer | 2012-02-28 |
| 7974114 | Memory cell arrangements | Thomas Nirschl, Mayk Roehrich | 2011-07-05 |
| 7864565 | Data retention monitor | Thomas Nirschl, Jan Otterstedt, Christian Peters, Wolf Allers, Michael Sommer | 2011-01-04 |
| 7619924 | Device and method for reading out memory information | Michael Sommer | 2009-11-17 |
| 7184291 | Semiconductor memory having charge trapping memory cells and fabrication method | Armin Kohlhase, Christoph Ludwig, Herbert Palm, Josef Willer | 2007-02-27 |
| 6563729 | Configuration for evaluating a signal which is read from a ferroelectric storage capacitor | Eric-Roger Brücklmeier, Tobias Schlager | 2003-05-13 |
| 6181183 | Steep edge time-delay relay | Paul-Werner von Basse, Roland Thewes, Doris Schmitt-Landsiedel | 2001-01-30 |
| 6138227 | Device for the jump-like addressing of specific lines of a serially operating digital memory | Roland Thewes, Doris Schmitt-Landsiedel, Paul-Werner von Basse | 2000-10-24 |
| 6097661 | Pointer circuit with low surface requirement high speed and low power loss | Roland Thewes, Doris Schmitt-Landsiedel, Paul-Werner von Basse, Ute Kollmer, Andreas Luck +2 more | 2000-08-01 |
| 6044006 | Method for programming a ROM cell arrangement | Paul-Werner von Basse, Roland Thewes, Doris Schmitt-Lansiedel | 2000-03-28 |
| 5831892 | Matrix memory in virtual ground architecture | Roland Thewes, Paul-Werner von Basse, Doris Schmitt-Landsiedel | 1998-11-03 |
| 5825686 | Multi-value read-only memory cell having an improved signal-to-noise ratio | Doris Schmitt-Landsiedel, Roland Thewes, Paul-Werner von Basse | 1998-10-20 |
| 5825701 | Memory cell arrangement of memory cells arranged in the form of a matrix | Paul-Werner von Basse, Roland Thewes, Doris Schmitt-Landsiedel | 1998-10-20 |
| 5751742 | Serially accessible memory means with high error correctability | Paul-Werner von Basse, Roland Thewes, Doris Schmitt-Landsiedel | 1998-05-12 |
| 5732013 | Matrix memory (virtual ground) | Paul-Werner von Basse, Roland Thewes, Doris Schmitt-Landsiedel | 1998-03-24 |