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Continuous self-calibration of internal analog signals |
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2010-01-05 |
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Implementation of a fusing scheme to allow internal voltage trimming |
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2009-05-26 |
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System and method for testing one or more dies on a semiconductor wafer |
Tao Wang, James Dietz, Bing Ren |
2008-11-11 |
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Test circuitry wafer |
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2008-02-12 |
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Integrated circuit in a maximum input/output configuration |
James Dietz |
2007-12-04 |
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Implementation of a fusing scheme to allow internal voltage trimming |
Jennifer Huckaby, George Alexander, Steven Baker |
2007-10-02 |
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System and method for testing one or more dies on a semiconductor wafer |
Tao Wang, James Dietz, Bing Ren |
2007-07-10 |
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Continuous self-calibration of internal analog signals |
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2007-02-13 |
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System and method for testing one or more dies on a semiconductor wafer |
Tao Wang, James Dietz, Bing Ren |
2006-10-10 |
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Methods and apparatus for implementing a power down in a memory device |
Torsten Partsch |
2006-07-18 |
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Wafer probecard interface |
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2006-07-04 |
| 6903982 |
Bit line segmenting in random access memories |
Aiqin Chen |
2005-06-07 |
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System and method for monitoring internal voltages on an integrated circuit |
George Alexander, Jennifer Huckaby, Steven Baker |
2005-01-18 |
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Topography correction for testing of redundant array elements |
Paul Brucke |
2004-06-22 |
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Cooling hood for circuit board |
Thoai-Thai Le, Guenter Gerstmeier, Tao Wang |
2004-04-13 |
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Leadless socket for decapped semiconductor device |
Bing Ren, James Dietz |
2004-03-09 |
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Semiconductor memory device and test method thereof using row compression test mode |
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2003-12-23 |
