CW

Christian Weis

Infineon Technologies Ag: 23 patents #305 of 7,486Top 5%
CG Continental Automotive Gmbh: 6 patents #160 of 2,324Top 7%
VG Vitesco Technologies Gmbh: 3 patents #82 of 668Top 15%
MA Mannesmann Vdo Ag: 3 patents #48 of 414Top 15%
SA Siemens Aktiengesellschaft: 2 patents #6,658 of 22,248Top 30%
Robert Bosch Gmbh: 2 patents #7,316 of 19,740Top 40%
DA Danaher: 1 patents #1,463 of 2,950Top 50%
IA Infineon Technology Ag: 1 patents #1 of 46Top 3%
QA Qimonda Ag: 1 patents #252 of 575Top 45%
📍 Budenheim, DE: #2 of 47 inventorsTop 5%
Overall (All Time): #64,909 of 4,157,543Top 2%
45
Patents All Time

Issued Patents All Time

Showing 26–45 of 45 patents

Patent #TitleCo-InventorsDate
6670802 Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more 2003-12-30
6614700 Circuit configuration with a memory array Stefan Dietrich, Peter Schrogmeier, Sabine Kieser 2003-09-02
6542389 Voltage pump with switch-on control Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more 2003-04-01
6532188 Integrated memory having a row access controller for activating and deactivating row lines Stefan Dietrich, Thomas Hein, Patrick Heyne, Thilo Marx, Torsten Partsch +3 more 2003-03-11
6526844 Module with force hysteresis 2003-03-04
6480024 Circuit configuration for programming a delay in a signal path Stefan Dietrich, Thomas Hein, Patrick Heyne, Michael Markert, Thilo Marx +4 more 2002-11-12
6453768 Pedal Andreas Wehner, Peter Kohlen 2002-09-24
6437410 Integrated memory Stefan Dietrich, Musa Saglam, Peter Schrogmeier, Michael Markert, Sabine Schoniger 2002-08-20
6404699 Integrated circuit having a command decoder Peter Schrogmeier, Stefan Dietrich, Sabine Schoniger 2002-06-11
6396755 Integrated memory with row access control to activate and precharge row lines, and method of operating such a memory Stefan Dietrich, Sabine Schoniger, Peter Schrogmeier 2002-05-28
6385123 Integrated circuit having a decoder unit and an additional input of a decoder unit to determine a number of outputs to be activated Stefan Dietrich, Peter Schrogmeier, Sabine Schoniger 2002-05-07
6359832 Method and circuit configuration for read-write mode control of a synchronous memory Stefan Dietrich, Sabine Schoniger, Peter Schrogmeier 2002-03-19
6351419 Integrated memory with a block writing function and global amplifiers requiring less space Stefan Dietrich, Peter Schrogmeier, Sabine Schoniger 2002-02-26
6310824 Integrated memory with two burst operation types Sabine Schoniger, Peter Schrogmeier, Stefan Dietrich 2001-10-30
6285605 Integrated memory having redundant units of memory cells, and test method for the redundant units Peter Schrogmeier, Stefan Dietrich, Sabine Schoniger 2001-09-04
6279883 Bearing module for an actuating element 2001-08-28
6275445 Synchronous integrated memory Stefan Dietrich, Peter Schrogmeier, Torsten Partsch 2001-08-14
6272035 Integrated memory Stefan Dietrich, Peter Schrogmeier, Torsten Partsch 2001-08-07
6256219 Integrated memory having memory cells disposed at crossover points of word lines and bit lines Peter Schrogmeier, Stefan Dietrich, Sabine Schoniger 2001-07-03
5889183 .beta.-Aminoethanesulphonylazide their use for the preparation of 2-aminoethane-sulphonamide (taurylamide), taurolidine or taurultam and their acid addition salts Claus Herdeis 1999-03-30