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USPTO Patent Rankings Data through Dec 31, 2025
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Iain Singleton — 26 Patents

ILImagination Technologies Limited: 26 patents #25 of 280Top 9%
Hemel Hempstead, GB: #3 of 120 inventorsTop 3%
Overall (All Time): #150,017 of 4,157,543Top 4%
26 Patents All Time
Iain Singleton has been granted 26 US patents while listed as an inventor at Imagination Technologies Limited. The first was granted in 2017 and the most recent in April 2025. Iain Singleton ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Iain Singleton in Hemel Hempstead, GB.

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #TitleCo-InventorsDate
12271259 Out-of-bounds recovery circuit Ashish Darbari 2025-04-08
12175179 Assessing performance of a hardware design using formal evaluation logic Ashish Darbari 2024-12-24
12093621 Detecting out-of-bounds violations in a hardware design using formal verification Ashish Darbari 2024-09-17
12050849 Livelock detection in a hardware design using formal evaluation logic Ashish Darbari 2024-07-30
11948652 Formal verification tool to verify hardware design of memory unit Ashish Darbari 2024-04-02
11847456 Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known state Ashish Darbari 2023-12-19
11663386 Detecting out-of-bounds violations in a hardware design using formal verification Ashish Darbari 2023-05-30
11593193 Out-of-bounds recovery circuit Ashish Darbari 2023-02-28
11531799 Assessing performance of a hardware design using formal evaluation logic Ashish Darbari 2022-12-20
11467840 Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known state Ashish Darbari 2022-10-11
11373025 Livelock detection in a hardware design using formal evaluation logic Ashish Darbari 2022-06-28
11250192 Detecting out-of-bounds violations in a hardware design using formal verification Ashish Darbari 2022-02-15
11250927 Formal verification tool to verify hardware design of memory unit Ashish Darbari 2022-02-15
11030039 Out-of-bounds recovery circuit Ashish Darbari 2021-06-08
10963611 Assessing performance of a hardware design using formal evaluation logic Ashish Darbari 2021-03-30
10936775 Detecting out-of-bounds violations in a hardware design using formal verification Ashish Darbari 2021-03-02
10909289 Livelock detection in a hardware design using formal evaluation logic Ashish Darbari 2021-02-02
10817367 Out-of-bounds recovery circuit Ashish Darbari 2020-10-27
10755011 Detecting out-of-bounds violations in a hardware design using formal verification Ashish Darbari 2020-08-25
10580511 Hardware monitor to verify memory units Ashish Darbari 2020-03-03
10552155 Livelock recovery circuit configured to detect illegal repetition of an instruction and transition to a known state Ashish Darbari 2020-02-04
10359825 Dynamic power measurement using formal John Alexander Osborne Netterville, Ashish Darbari 2019-07-23
10346571 Livelock detection in a hardware design using formal evaluation logic Ashish Darbari 2019-07-09
10331831 Assessing performance of a hardware design using formal evaluation logic Ashish Darbari 2019-06-25
10210119 Arbiter verification Ashish Darbari, John Alexander Osborne Netterville 2019-02-19