Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7983022 | Electrically connecting multiple cathodes in a case negative multi-anode capacitor | Laurie O'Connor, Kenneth B. Talamine, Keith W. Seitz, Anthony C. Perez | 2011-07-19 |
| 6961247 | Power grid and bump pattern with reduced inductance and resistance | Nayon Tomsio, Linda Whitney | 2005-11-01 |
| 6338025 | Data processing system and method to estimate power in mixed dynamic/static CMOS designs | Michael Alexander Bowen, Byron L. Krauter, Clay Chip Smith, Amy May Tuvell | 2002-01-08 |
| 5614838 | Reduced power apparatus and method for testing high speed components | Talal K. Jaber | 1997-03-25 |
| 4802591 | Louvered chip screener | William E. Lower, W. Nash McCauley, Stephen C. Mitchell, Roger C. Robins | 1989-02-07 |