Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8032349 | Efficient methodology for the accurate generation of customized compact model parameters from electrical test data | Sim Y. Loo, Myung-Hee Na, Edward J. Nowak, Scott K. Springer | 2011-10-04 |
| 7783466 | IC chip parameter modeling | John R. Jones, Henry W. Trombley, Josef S. Watts | 2010-08-24 |
| 7124387 | Integrated circuit macro placing system and method | Robert J. Allen, Kevin W. McCullen | 2006-10-17 |
| 6305004 | Method for improving wiring related yield and capacitance properties of integrated circuits by maze-routing | Gustavo E. Tellez, Gary R. Doyle, Philip S. Honsinger, Charles L. Meiley, Gorden Seth Starkey, Jr. +1 more | 2001-10-16 |