Issued Patents All Time
Showing 51–69 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9582472 | Conjugate gradient solvers for linear systems | Christoph Angerer, Konstantinos Bekas, Alessandro Curioni, Christoph Hagleitner, Raphael Polig | 2017-02-28 |
| 9575769 | Code updates in processing systems | Vincenzo Condorelli, William Santiago-Fernandez, Tamas Visegrady | 2017-02-21 |
| 9575930 | Conjugate gradient solvers for linear systems | Christoph Angerer, Konstantinos Bekas, Alessandro Curioni, Christoph Hagleitner, Raphael Polig | 2017-02-21 |
| 9554477 | Tamper-respondent assemblies with enclosure-to-board protection | William L. Brodsky, James A. Busby, Edward N. Cohen, Michael J. Fisher, David C. Long +3 more | 2017-01-24 |
| 9535656 | Pipelined modular reduction and division | Vincenzo Condorelli, William Santiago Fernandez, Nihad Hadzic, Andrew R. Ranck | 2017-01-03 |
| 9471276 | Pipelined modular reduction and division | Vincenzo Condorelli, William Santiago Fernandez, Nihad Hadzic, Andrew R. Ranck | 2016-10-18 |
| 9069966 | Code updates in processing systems | Vincenzo Condorelli, William S. Fernandez, Tamas Visegrady | 2015-06-30 |
| 8977902 | Integrity checking including side channel monitoring | Vincenzo Condorelli, Tamas Visegrady | 2015-03-10 |
| 8832696 | Adaptive channel for algorithms with different latency and performance points | Vincenzo Condorelli, Tamas Visegrady | 2014-09-09 |
| 8631058 | Providing nondeterministic data | Tamas Visegrady, Vincenzo Condorelli | 2014-01-14 |
| 8613111 | Configurable integrated tamper detection circuitry | Vincenzo Condorelli, Tamas Visegrady | 2013-12-17 |
| 8140792 | Indirectly-accessed, hardware-affine channel storage in transaction-oriented DMA-intensive environments | Vincenzo Condorelli, Tamas Visegrady | 2012-03-20 |
| 7831805 | Coupling a general purpose processor to an application specific instruction set processor | Andreas Doering | 2010-11-09 |
| 7725591 | Detecting a timeout of elements in an element processing system | Andreas Doering | 2010-05-25 |
| 7613850 | System and method utilizing programmable ordering relation for direct memory access | Andreas Doering, Patricia M. Sagmeister, Jonathan B. Rohrer, Rolf Clauberg, Florian A. Auernhammer +1 more | 2009-11-03 |
| 7603540 | Using field programmable gate array (FPGA) technology with a microprocessor for reconfigurable, instruction level hardware acceleration | Andreas Doering, Andreas Herkersdorf, Richard Gerard Hofmann, Charles Edward Kuhlmann | 2009-10-13 |
| 7584345 | System for using FPGA technology with a microprocessor for reconfigurable, instruction level hardware acceleration | Andreas Doering, Andreas Herkersdorf, Richard Gerard Hofmann, Charles Edward Kuhlmann | 2009-09-01 |
| 7552226 | Detecting a timeout of elements in an element processing system | Andreas Doering | 2009-06-23 |
| 7293159 | Coupling GP processor with reserved instruction interface via coprocessor port with operation data flow to application specific ISA processor with translation pre-decoder | Andreas Doering | 2007-11-06 |