| 7660940 |
Carrier having daisy chain of self timed memory chips |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2010-02-09 |
| 7650455 |
Spider web interconnect topology utilizing multiple port connection |
Gerald K. Bartley, Darryl J. Becker, John Michael Borkenhagen, Philip Raymond Germann, William Paul Hovis +1 more |
2010-01-19 |
| 7627711 |
Memory controller for daisy chained memory chips |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-12-01 |
| 7620763 |
Memory chip having an apportionable data bus |
Gerald K. Bartley, Darryl J. Becker, John Michael Borkenhagen, Philip Raymond Germann, Andrew Benson Maki +1 more |
2009-11-17 |
| 7617350 |
Carrier having daisy chained memory chips |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-11-10 |
| 7577811 |
Memory controller for daisy chained self timed memory chips |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-08-18 |
| 7553696 |
Method for implementing component placement suspended within grid array packages for enhanced electrical performance |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-06-30 |
| 7545664 |
Memory system having self timed daisy chained memory chips |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-06-09 |
| 7546410 |
Self timed memory chip having an apportionable data bus |
Gerald K. Bartley, Darryl J. Becker, John Michael Borkenhagen, Philip Raymond Germann, Andrew Benson Maki +1 more |
2009-06-09 |
| 7490186 |
Memory system having an apportionable data bus and daisy chained memory chips |
Gerald K. Bartley, Darryl J. Becker, John Michael Borkenhagen, Philip Raymond Germann, Andrew Benson Maki +1 more |
2009-02-10 |
| 7480201 |
Daisy chainable memory chip |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-01-20 |
| 7477568 |
Using common mode differential data signals of DDR2 SDRAM for control signal transmission |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2009-01-13 |
| 7472360 |
Method for implementing enhanced wiring capability for electronic laminate packages |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more |
2008-12-30 |
| 7472368 |
Method for implementing vertically coupled noise control through a mesh plane in an electronic package design |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2008-12-30 |
| 7402912 |
Method and power control structure for managing plurality of voltage islands |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2008-07-22 |
| 7362651 |
Using common mode differential data signals of DDR2 SDRAM for control signal transmission |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2008-04-22 |
| 7345900 |
Daisy chained memory system |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2008-03-18 |
| 7345901 |
Computer system having daisy chained self timed memory chips |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2008-03-18 |
| 7342816 |
Daisy chainable memory chip |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2008-03-11 |
| 7202685 |
Embedded probe-enabling socket with integral probe structures |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2007-04-10 |
| 7088199 |
Method and stiffener-embedded waveguide structure for implementing enhanced data transfer |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2006-08-08 |
| 7088200 |
Method and structure to control common mode impedance in fan-out regions |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2006-08-08 |
| 7074050 |
Socket assembly with incorporated memory structure |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2006-07-11 |
| 7050871 |
Method and apparatus for implementing silicon wafer chip carrier passive devices |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more |
2006-05-23 |
| 7036709 |
Method and structure for implementing column attach coupled noise suppressor |
Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson |
2006-05-02 |
