KS

Kevin E. Sallese

IBM: 15 patents #7,450 of 70,183Top 15%
LS Lattice Semiconductor: 3 patents #173 of 544Top 35%
AT AT&T: 1 patents #10,626 of 18,772Top 60%
Overall (All Time): #231,910 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11880299 Calendar based flash command scheduler for dynamic quality of service scheduling and bandwidth allocations 2024-01-23
11880300 Generating multi-plane reads to read pages on planes of a storage die for a page to read Adalberto G. Yanes, Timothy J. Fisher, Cyril Varkey 2024-01-23
11301170 Performing sub-logical page write operations in non-volatile random access memory (NVRAM) using pre-populated read-modify-write (RMW) buffers Timothy J. Fisher, Andrew D. Walls 2022-04-12
11086565 Reducing effects of read array operations of read apparent voltage Timothy J. Fisher, Adalberto G. Yanes, Jason Ma, Charles A. Keller, Aaron D. Fry +2 more 2021-08-10
11048571 Selectively performing multi-plane read operations in non-volatile memory Nikolas Ioannou, Nikolaos Papandreou, Roman A. Pletka, Sasa Tomic, Charalampos Pozidis +2 more 2021-06-29
11036427 Using content addressable memory to perform read-modify-write operations in non-volatile random access memory (NVRAM) Timothy J. Fisher 2021-06-15
10770155 Determining a read apparent voltage infector page and infected page Timothy J. Fisher, Aaron D. Fry, Van Huynh, Charles A. Keller, Jason Ma +1 more 2020-09-08
10552243 Corrupt logical block addressing recovery scheme Roman A. Pletka, Timothy J. Fisher, Robert Edward Galbraith, Christopher M. Dennett 2020-02-04
10489086 Reducing read errors by performing mitigation reads to blocks of non-volatile memory Adalberto G. Yanes, Timothy J. Fisher, Charles A. Keller, Jason Ma, Aaron D. Fry +2 more 2019-11-26
10289304 Physical address management in solid state memory by tracking pending reads therefrom Charles J. Camp, Timothy J. Fisher 2019-05-14
10169145 Read buffer architecture supporting integrated XOR-reconstructed and read-retry for non-volatile random access memory (NVRAM) systems Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Ashwitha Krishna Kumar, David A. Pierce +1 more 2019-01-01
9996266 Physical address management in solid state memory Charles J. Camp, Timothy J. Fisher 2018-06-12
9857977 Physical address management in solid state memory Charles J. Camp, Timothy J. Fisher 2018-01-02
9400745 Physical address management in solid state memory Charles J. Camp, Timothy J. Fisher 2016-07-26
9298549 Read buffer architecture supporting integrated XOR-reconstructed and read-retry for non-volatile random access memory (NVRAM) systems Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Ashwitha Krishna Kumar, David A. Pierce +1 more 2016-03-29
7430706 Diagonal interleaved parity calculator Shu Yuan, Thomas A. Peterson 2008-09-30
7191388 Fast diagonal interleaved parity (DIP) calculator Shu Yuan, Thomas A. Peterson 2007-03-13
6940309 Programmable logic device with a memory-based finite state machine 2005-09-06
6075785 Apparatus and method for providing memory address interchanging for high speed memory accesses Frank Manuel Reveles, Charles Joseph Wilde 2000-06-13