Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8735975 | Implementing semiconductor soc with metal via gate node high performance stacked transistors | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2014-05-27 |
| 8617939 | Enhanced thin film field effect transistor integration into back end of line | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-12-31 |
| 8592921 | Deep trench embedded gate transistor | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Ulmann | 2013-11-26 |
| 8574982 | Implementing eDRAM stacked FET structure | Karl R. Erickson, David P. Paulsen, John E. Sheets, II | 2013-11-05 |
| 8575613 | Implementing vertical signal repeater transistors utilizing wire vias as gate nodes | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-11-05 |
| 8539425 | Utilizing gate phases for circuit tuning | Karl Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-09-17 |
| 8525245 | eDRAM having dynamic retention and performance tradeoff | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-09-03 |
| 8492207 | Implementing eFuse circuit with enhanced eFuse blow operation | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-07-23 |
| 8492220 | Vertically stacked FETs with series bipolar junction transistor | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II | 2013-07-23 |
| 8456187 | Implementing temporary disable function of protected circuitry by modulating threshold voltage of timing sensitive circuit | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-06-04 |
| 8435851 | Implementing semiconductor SoC with metal via gate node high performance stacked transistors | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-05-07 |
| 8395186 | Implementing vertical signal repeater transistors utilizing wire vias as gate nodes | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-03-12 |
| 8384414 | Implementing hacking detection and block function at indeterminate times with priorities and limits | Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann | 2013-02-26 |
| 8114747 | Method for creating 3-D single gate inverter | Phil C. Paone, David P. Paulsen, John E. Sheets, II | 2012-02-14 |
| 8034461 | Preparation of multilayer polyethylene thin films | D. Ryan Breese, Charles S. Holland, Mark P. Mack | 2011-10-11 |
| 7868391 | 3-D single gate inverter | Phil C. Paone, David P. Paulsen, John E. Sheets, II | 2011-01-11 |
| 7538173 | Polyolefin compositions | Thomas J. Schwab, Jean A. Merrick-Mack, Wallace W. Yau | 2009-05-26 |
| 7514276 | Aligning stacked chips using resistance assistance | Corey Elizabeth Yearous, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, John E. Sheets, II +1 more | 2009-04-07 |
| 6613841 | Preparation of machine direction oriented polyethylene films | — | 2003-09-02 |
| 6355733 | Polyethylene blends and films | Leonard V. Cribbs, Stephen M. Imfeld, Venki Chandrashekar | 2002-03-12 |