Issued Patents All Time
Showing 51–60 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6636913 | Data length control of access to a data bus | Gary W. Batchelor, Michael T. Benhase, Robert E. Medlin, Juan Antonio Yanes | 2003-10-21 |
| 6557087 | Management of PCI read access to a central resource | Russell Lee Ellison, Juan Antonio Yanes | 2003-04-29 |
| 6490644 | Limiting write data fracturing in PCI bus systems | Robert E. Medlin, Juan Antonio Yanes | 2002-12-03 |
| 6381677 | Method and system for staging data into cache | Brent Cameron Beardsley, Michael T. Benhase, Thomas Charles Jarvis, Douglas A. Martin, Robert Louis Morton | 2002-04-30 |
| 5721898 | Method and system for data search in a data processing system | Brent Cameron Beardsley, Michael T. Benhase, Lawrence Carter Blount, Susan K. Candelaria | 1998-02-24 |
| 5717888 | Accessing cached data in a peripheral disk data storage system using a directory having track and cylinder directory entries | Susan K. Candelaria, Vernon J. Legvold | 1998-02-10 |
| 5694570 | Method and system of buffering data written to direct access storage devices in data processing systems | Brent Cameron Beardsley, Susan K. Candelaria, Joel H. Cord, Michael H. Hartung, John Norbert McCauley | 1997-12-02 |
| 5636359 | Performance enhancement system and method for a hierarchical data cache using a RAID parity scheme | Brent Cameron Beardsley, Joel H. Cord, Vernon J. Legvold, Carol Santich Michod, Gary Eugene Morain +3 more | 1997-06-03 |
| 5627990 | Management system for a hierarchical data cache employing preemptive cache track demotion and restaging to adapt to access patterns | Joel H. Cord, Michael H. Hartung, Vernon J. Legvold, William G. Sherman | 1997-05-06 |
| 5426761 | Cache DASD sequential staging and method | Joel H. Cord, Susan K. Candelaria, Larry R. Perry | 1995-06-20 |