RM

Robert E. Medlin

IBM: 14 patents #8,004 of 70,183Top 15%
Overall (All Time): #353,191 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8495321 Firehose dump of SRAM write cache data to non-volatile memory using a supercap Michael L. Harper, Craig Anthony Klein, Gregg S. Lucas, Mary A. J. Marquez 2013-07-23
8195901 Firehose dump of SRAM write cache data to non-volatile memory using a supercap Michael L. Harper, Craig Anthony Klein, Gregg S. Lucas, Mary A. J. Marquez 2012-06-05
7936767 Systems and methods for monitoring high speed network traffic via sequentially multiplexed data streams Katherine T. Blinick, John C. Elliott, Gregg S. Lucas, Gordon L. Washburn 2011-05-03
7900096 Freeing a serial bus hang condition by utilizing distributed hang timers Bryan N. Cardwell, Michael L. Harper, Craig Anthony Klein, Gregg S. Lucas, Mary A. J. Marquez 2011-03-01
7787482 Independent drive enclosure blades in a blade server system with low cost high speed switch modules Katherine T. Blinick, Rezaul Shah Mohammad Islam, Gregg S. Lucas, Tohru Sumiyoshi 2010-08-31
7624203 Multiplexing a ground signal on a high speed cable interface to provide access to cable vital product data Katherine T. Blinick, Yutaka Kawai, Gregg S. Lucas, Kenneth R. Schneebeli, Michael H. Stamps 2009-11-24
7546415 Apparatus, system, and method for integrating multiple raid storage instances within a blade center Katherine T. Blinick, Shah Mohammad Rezaul Islam, Gregg S. Lucas 2009-06-09
7542302 Minimizing thickness of deadfronted display assemblies Michael A. Curnalia, Michael L. Harper, Craig Anthony Klein, Gregg S. Lucas, Mary A. J. Marquez 2009-06-02
7020809 System and method for utilizing spare bandwidth to provide data integrity over a bus Yvonne Hanson Kleppel, Russell Lee Ellison, Enrique Q. Garcia, Rajendrasinh Jadeja, Gregg S. Lucas 2006-03-28
6636913 Data length control of access to a data bus Gary W. Batchelor, Michael T. Benhase, Joseph S. Hyde, II, Juan Antonio Yanes 2003-10-21
6490644 Limiting write data fracturing in PCI bus systems Joseph S. Hyde, II, Juan Antonio Yanes 2002-12-03
6449678 Method and system for multiple read/write transactions across a bridge system Gary W. Batchelor, Russell Lee Ellison, Carl E. Jones, Belayneh Tafesse, Forrest Lee Wade +1 more 2002-09-10
6425023 Method and system for gathering and buffering sequential data for a transaction comprising multiple data access requests Gary W. Batchelor, Carl E. Jones, Dell Patrick Leabo, Forrest Lee Wade 2002-07-23
6189117 Error handling between a processor and a system managed by the processor Gary W. Batchelor, Brent Cameron Beardsley, Michael T. Benhase, Jack Harvey Derenburger, Carl E. Jones +2 more 2001-02-13