Issued Patents All Time
Showing 25 most recent of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6823429 | Memory controller for controlling memory accesses across networks in distributed shared memory processing systems | — | 2004-11-23 |
| 6408341 | Multi-tasking adapter for parallel network applications | James William Feeney, George William Wilhelm, Jr. | 2002-06-18 |
| 6389476 | Networks adapters for multi-speed transmissions | — | 2002-05-14 |
| 6343346 | Cache coherent network adapter for scalable shared memory processing systems | — | 2002-01-29 |
| 6263374 | Apparatus for coupling a bus-based architecture to a switch network | Michael W. Dotson, James William Feeney, Michael Hans Fisher, John D. Jabusch, Robert Francis Lusch +1 more | 2001-07-17 |
| 6243378 | Method and apparatus for minimizing contention losses in networks | — | 2001-06-05 |
| 6226683 | Increasing probability multi-stage network | Jehoshua Bruck, James William Feeney, Eli Upfal | 2001-05-01 |
| 6215412 | All-node switch-an unclocked, unbuffered, asynchronous switching apparatus | Peter A. Franaszek, Christos J. Georgiou, Robert Francis Lusch, Joseph M. Mosley | 2001-04-10 |
| 6122674 | Bi-directional network adapter for interfacing local node of shared memory parallel processing system to multi-stage switching network for communications with remote node | — | 2000-09-19 |
| 6122659 | Memory controller for controlling memory accesses across networks in distributed shared memory processing systems | — | 2000-09-19 |
| 6098123 | Method and apparatus for dynamic allocation of bandwidth to/from network adapter memory amongst active input/output ports | — | 2000-08-01 |
| 6092155 | Cache coherent network adapter for scalable shared memory processing systems | — | 2000-07-18 |
| 6072781 | Multi-tasking adapter for parallel network applications | James William Feeney, George William Wilhelm, Jr. | 2000-06-06 |
| 6047113 | Network adapters for multi-speed transmissions | — | 2000-04-04 |
| 6044059 | Method and apparatus for minimizing contention losses in networks | — | 2000-03-28 |
| 6044438 | Memory controller for controlling memory accesses across networks in distributed shared memory processing systems | — | 2000-03-28 |
| 6034956 | Method of simultaneously attempting parallel path connections in a multi-stage interconnection network | Jehoshua Bruck, Michael Hans Fisher, Joel Gould, John D. Jabusch, Arthur R. Williams | 2000-03-07 |
| 5933428 | Two-tailed adapter for scalable, non-blocking networks | — | 1999-08-03 |
| 5922063 | Automatic hardware message header generator | Michael W. Dotson, James William Feeney, Robert Francis Lusch, Michael Anthony Maniguet | 1999-07-13 |
| 5920704 | Dynamic routing switch apparatus with clocked signal regeneration | Donald G. Grice, Arthur R. Williams | 1999-07-06 |
| 5901291 | Method and apparatus for maintaining message order in multi-user FIFO stacks | James William Feeney, George William Wilhelm, Jr. | 1999-05-04 |
| 5835024 | Multi-stage interconnection network with selectable function switching apparatus | Jehoshua Bruck, James William Feeney, Michael Hans Fisher, Eliezer Upfal, Arthur R. Williams | 1998-11-10 |
| 5786771 | Selectable checking of message destinations in a switched parallel network | James William Feeney, John D. Jabusch, Robert Francis Lusch | 1998-07-28 |
| 5774698 | Multi-media serial line switching adapter for parallel networks and heterogeneous and homologous computer system | — | 1998-06-30 |
| 5774067 | Flash-flooding multi-stage interconnection network with parallel path seeking switching elements | Jehoshua Bruck, Michael Hans Fisher, Joel Gould, John D. Jabusch, Arthur R. Williams | 1998-06-30 |