Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8016482 | Method and systems of powering on integrated circuit | Igor Arsovski, Anthony R. Bonaccio, Serafino Bueti, Hayden C. Cranford, Jr., Joseph A. Iandanza +3 more | 2011-09-13 |
| 7898286 | Critical path redundant logic for mitigation of hardware across chip variation | Igor Arsovski, Hayden C. Cranford, Jr., Joseph A. Iadanza, Todd E. Leonard, Jason M. Norman +1 more | 2011-03-01 |
| 7823107 | Transition balancing for noise reduction/Di/Dt reduction during design, synthesis, and physical design | Igor Arsovski, Serafino Bueti, Joseph A. Iadanza, Jason M. Norman, Sebastian T. Ventrone | 2010-10-26 |
| 7716007 | Design structures of powering on integrated circuit | Igor Arsovski, Anthony R. Bonaccio, Serafino Bueti, Hayden C. Cranford, Jr., Joseph A. Iadanza +3 more | 2010-05-11 |
| 7643591 | Transition balancing for noise reduction /Di/Dt reduction during design, synthesis, and physical design | Igor Arsovski, Serafino Bueti, Joseph A. Iadanza, Jason M. Norman, Sebastian T. Ventrone | 2010-01-05 |
| 7483806 | Design structures, method and systems of powering on integrated circuit | Igor Arsovski, Anthony R. Bonaccio, Serafino Bueti, Hayden C. Cranford, Jr., Joseph A. Iadanza +3 more | 2009-01-27 |
| 5532970 | No latency pipeline | Edward Butler, Martin B. Lundberg, Pushkar U. Mokashi, Alfred L. Sartwell, Robert Tamlyn | 1996-07-02 |
| 5490114 | High performance extended data out | Edward Butler, Robert B. Goodwin, Robert Tamlyn | 1996-02-06 |