Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5426754 | Cross-interrogate method and means for combined scaler and vector processing system | Donald G. Grice, Reza Raji | 1995-06-20 |
| 5418796 | Synergistic multiple bit error correction for memory of array chips | Yee-Ming Ting | 1995-05-23 |
| 5371893 | Look-ahead priority arbitration system and method | Forrest A. Reiley, William K. Rodiger | 1994-12-06 |
| 5333291 | Stride enhancer for high speed memory accesses with line fetching mode and normal mode employing boundary crossing determination | Warren W. Grunbok, De Tran | 1994-07-26 |
| 5278800 | Memory system and unique memory chip allowing island interlace | Warren W. Grunbok, Billy J. Knowles, William R. Milani, Douglas R. Moran, Dale E. Pontius +4 more | 1994-01-11 |
| 5265232 | Coherence control by data invalidation in selected processor caches without broadcasting to processor caches not having the data | Patrick M. Gannon, Michael Ignatowski, Matthew A. Krygowski, Lishing Liu, William K. Rodiger +3 more | 1993-11-23 |