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Autonomous robotic avatars |
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Pre-processing partial inputs for accelerating automatic dialog response |
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Extended segmented precharge architecture |
Derwin Jallice, Michael K. Ciraula |
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Address transition detection (ATD) circuit for asynchronous VLSI chips |
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Chip select speedup circuit for a memory |
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Glitch-proof powered-down on chip receiver with non-overlapping outputs |
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Zero standby power, radiation hardened, memory redundancy circuit |
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1991-02-26 |
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Asynchronous segmented precharge architecture |
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1990-11-06 |
