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USPTO Patent Rankings Data through Dec 31, 2025
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Arnold Blum — 15 Patents

IBM: 14 patents #8,031 of 70,183Top 15%
Gechingen, DE: #2 of 45 inventorsTop 5%
Overall (All Time): #307,048 of 4,157,543Top 8%
15 Patents All Time
Arnold Blum has been granted 15 US patents while listed as an inventor at IBM. The first was granted in 1980 and the most recent in November 1995. Arnold Blum ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Arnold Blum in Gechingen, DE.

Patents per Year

Patents granted per year, 1980 to 1995Bar chart with a peak of 3 patents in 1984.peak 31980: 1 patents19801981: 1 patents19811983: 1 patents19831984: 3 patents19841986: 2 patents19861987: 2 patents19871989: 1 patents19891992: 2 patents19921994: 1 patents19941995: 1 patents1995

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
5467452 Routing control information via a bus selectively controls whether data should be routed through a switch or a bus according to number of destination processors Gottfried Goldrian, Wolfgang Kumpf 1995-11-14 $11,832,000
5319948 Low temperature generation process and expansion engine Manfred Schmidt 1994-06-14
5164818 Removable VLSI assembly Frank Gerth, Manfred Perske, Manfred Schmidt 1992-11-17 $11,529,000
5078581 Cascade compressor Manfred Perske, Manfred Schmidt 1992-01-07 $20,447,000
4802062 Integrated wiring system for VLSI Marian Briska, Knut Najmann 1989-01-31 $32,322,000
4688222 Built-in parallel testing circuit for use in a processor 1987-08-18 $29,053,000
4669079 Method and apparatus for bus arbitration in a data processing system 1987-05-26 $47,285,000
4621363 Testing and diagnostic device for digital computers 1986-11-04 $46,772,000
4604746 Testing and diagnostic device for digital computers 1986-08-05 $18,342,000
4490673 Testing an integrated circuit containing a tristate driver and a control signal generating network therefor Helmut Schettler 1984-12-25
4476431 Shift register latch circuit means contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques and utilized at least in part for check and test purposes 1984-10-09 $20,988,000
4428060 Shift register latch circuit means for check and test purposes and contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques 1984-01-24 $32,725,000
4419739 Decentralized generation of synchronized clock control signals having dynamically selectable periods 1983-12-06 $23,661,000
4295220 Clock check circuits using delayed signals Hellmuth R. Geng, Hermann Schulze-Schoelling, Bernd Spaeth 1981-10-13 $5,825,000
4231085 Arrangement for micro instruction control Dieter Bazlen, Rolf Berger, Dietrich W. Bock, Herbert Chilinski, Hellmuth R. Geng +4 more 1980-10-28 $25,319,000