Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8759903 | Method of fabricating total dose hard and thermal neutron hard integrated circuits | Michael S. Liu, David James Swanson | 2014-06-24 |
| 8399845 | Neutron detector cell efficiency | Paul S. Fechner, David O. Erstad, Todd A. Randazzo | 2013-03-19 |
| 8310021 | Neutron detector with wafer-to-wafer bonding | Todd A. Randazzo | 2012-11-13 |
| 8153985 | Neutron detector cell efficiency | Todd A. Randazzo, Paul S. Fechner | 2012-04-10 |
| 7964897 | Direct contact to area efficient body tie process flow | Paul S. Fechner, Gregor D. Dougal, Keith Golke | 2011-06-21 |
| 7679139 | Non-planar silicon-on-insulator device that includes an “area-efficient” body tie | Michael S. Liu, Paul S. Fechner | 2010-03-16 |
| 7378705 | Single-poly EEPROM cell with lightly doped MOS capacitors | James E. Riekels, Thomas Lucking, Gary Gardner | 2008-05-27 |
| 7177489 | Silicon-insulator-silicon thin-film structures for optical modulators and methods of manufacture | Thomas Keyser, Cheisan Yue | 2007-02-13 |
| 6890832 | Radiation hardening method for shallow trench isolation in CMOS | David B. Kerwin | 2005-05-10 |
| 6828212 | Method of forming shallow trench isolation structure in a semiconductor device | Timothy Mark Barry, Nicolas Degors, Donald A. Erickson, Amit S. Kelkar | 2004-12-07 |
| RE36777 | Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer | Todd A. Randazzo, Donald A. Erickson | 2000-07-11 |
| 5583380 | Integrated circuit contacts with secured stringers | Kurt Schertenleib | 1996-12-10 |
| 5493142 | Input/output transistors with optimized ESD protection | Todd A. Randazzo, Geoffrey S. Gongwer | 1996-02-20 |
| 5440159 | Single layer polysilicon EEPROM having uniform thickness gate oxide/capacitor dielectric layer | Todd A. Randazzo, Geoffrey S. Gongwer | 1995-08-08 |
| 5352618 | Method for forming thin tunneling windows in EEPROMs | Donald A. Erickson | 1994-10-04 |
| 5340764 | Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer | Todd A. Randazzo, Donald A. Erickson | 1994-08-23 |