Issued Patents All Time
Showing 51–75 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7254069 | Semiconductor memory device storing redundant replacement information with small occupation area | Masaru Haraguchi | 2007-08-07 |
| 7237175 | Memory circuit | Makoto Hatakenaka, Koji Nii, Atsuo Mangyo | 2007-06-26 |
| 7233481 | Electric double layer capacitor and electrolyte solution therefor | — | 2007-06-19 |
| 7224574 | Electric double layer capacitor | Byoungju Lee | 2007-05-29 |
| 7214646 | Method for producing activated carbon for electrode of electric double-layer capacitor | Shigeki Oyama, Naohiko Oki, Minoru Noguchi, Kenji Sato, Shushi Nishimura +3 more | 2007-05-08 |
| 7139208 | Refresh-free dynamic semiconductor memory device | Kazutami Arimoto, Hiroki Shimano, Takeshi Hashizume | 2006-11-21 |
| 7102954 | Semiconductor integrated circuit device having logic circuit and dynamic random access memory on the same chip | Hideyuki Noda, Kazutami Arimoto, Katsumi Dosaka | 2006-09-05 |
| 7088570 | Carbonized product used for production of activated carbon for electrode of electric double-layer capacitor | Shigeki Oyama, Minoru Noguchi | 2006-08-08 |
| 7068494 | Electric double layer capacitor | — | 2006-06-27 |
| 7067051 | Process for producing carbonized product used for producing activated carbon for electrode of electric double-layer capacitor, and organic material for carbonized product | — | 2006-06-27 |
| 7047461 | Semiconductor integrated circuit device with test data output nodes for parallel test results output | Akira Yamazaki, Atsuo Mangyo | 2006-05-16 |
| 6980454 | Low-power consumption semiconductor memory device | Kazutami Arimoto, Hiroki Shimano | 2005-12-27 |
| 6925022 | Refresh-free dynamic semiconductor memory device | Kazutami Arimoto, Hiroki Shimano, Takeshi Hashizume | 2005-08-02 |
| 6804164 | Low-power consumption semiconductor memory device | Kazutami Arimoto, Hiroki Shimano | 2004-10-12 |
| 6785122 | Method for preparing electrolytic solution, electrolytic solution and electric double-layer capacitor | Minoru Noguchi, Shigeki Oyama | 2004-08-31 |
| 6674685 | Semiconductor memory device having write column select gate | — | 2004-01-06 |
| 6660583 | Process for producing activated carbon for electrode of electric double-layer capacitor, and carbon material | Shigeki Oyama, Kenji Sato, Minoru Noguchi | 2003-12-09 |
| 6649984 | Logic-merged memory | Hideyuki Noda, Kazutami Arimoto, Katsumi Dosaka | 2003-11-18 |
| 6643214 | Semiconductor memory device having write column select gate | Yasuhiko Taito, Masaru Haraguchi | 2003-11-04 |
| 6636454 | Low-power consumption semiconductor memory device | Kazutami Arimoto, Hiroki Shimano | 2003-10-21 |
| 6590511 | Retrievable memory capable of outputting a piece of data with respect to a plurality of results of retrieve | Isamu Hayashi, Hideyuki Noda, Hiroki Shimano | 2003-07-08 |
| 6507532 | Semiconductor memory device having row-related circuit operating at high speed | Kazunari Inoue, Akira Yamazaki, Kazutami Arimoto | 2003-01-14 |
| 6449204 | DYNAMIC SEMICONDUCTOR MEMORY DEVICE CAPABLE OF REARRANGING DATA STORAGE FROM A ONE BIT/ONE CELL SCHEME IN A NORMAL MODE TO A ONE BIT/TWO CELL SCHEME IN A TWIN-CELL MODE FOR LENGTHENING A REFRESH INTERVAL | Kazutami Arimoto, Hiroki Shimano, Takeshi Hashizume | 2002-09-10 |
| 6418067 | Semiconductor memory device suitable for merging with logic | Naoya Watanabe, Akira Yamazaki, Kazutami Arimoto, Isamu Hayashi, Hideyuki Noda | 2002-07-09 |
| 6404695 | Semiconductor memory device including a plurality of memory blocks arranged in rows and columns | Akira Yamazaki | 2002-06-11 |