Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5222227 | Direct memory access controller for a multi-microcomputer system | Kaoru Sakoshita, Hiroshi Yonezawa | 1993-06-22 |
| 5047920 | Hierarchal system for reducing memory access time to plural equal sized memories by simultaneously addressing and accessing memory | — | 1991-09-10 |
| 5019962 | Direct memory access controller for a multi-microcomputer system | Kaoru Sakoshita, Hiroshi Yonezawa | 1991-05-28 |
| 4894768 | Data processing system with coprocessor | Kazuhiko Iwasaki, Ikuya Kawasaki, Hideo Inayoshi, Atsushi Hasegawa, Takao Yaginuma +1 more | 1990-01-16 |
| 4773002 | Microprogram controller in which instruction following conditional branch instruction is selectively converted to a NOP instruction | Kazuhiko Iwasaki, Noboru Yamaguchi, Junichi Tatezaki, Takanori Shimura | 1988-09-20 |
| 4716522 | Microcomputer system with buffer in peripheral storage control | Kazuhiko Iwasaki, Hideo Nakamura | 1987-12-29 |
| 4677623 | Decoding method and apparatus for cyclic codes | Kazuhiko Iwasaki, Junichi Tatezaki | 1987-06-30 |
| 4674037 | Data processing system with an enhanced communication control system | Kazuhiko Iwasaki, Noboru Yamaguchi, Takanori Shimura, Junichi Tatezaki | 1987-06-16 |
| 4387294 | Shift register-latch circuit driven by clocks with half cycle phase deviation and usable with a serial alu | Hideo Nakamura | 1983-06-07 |
| 4353030 | Pulse frequency multiplier circuit | Hideo Nakamura, Haruo Koizumi | 1982-10-05 |
| 4319226 | Signal converter utilizing two clock signals | Hideo Nakamura, Katsuaki Takagi | 1982-03-09 |