Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6321370 | Method of supporting arrangement of semiconductor integrated circuit | Katsuyoshi Suzuki | 2001-11-20 |
| 4703257 | Logic circuit having a test data scan circuit | Takao Nishida, Kaoru Moriwaki, Shun Ishiyama, Shunsuke Miyamoto | 1987-10-27 |