Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6806130 | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device | Hiroto Kawagoe, Shogo Kiyota, Norio Suzuki, Eiichi Yamada, Yuji Sugino +4 more | 2004-10-19 |
| 6630375 | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device | Hiroto Kawagoe, Shogo Kiyota, Norio Suzuki, Eiichi Yamada, Yuji Sugino +4 more | 2003-10-07 |
| 6368905 | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device | Hiroto Kawagoe, Shogo Kiyota, Norio Suzuki, Eiichi Yamada, Yuji Sugino +4 more | 2002-04-09 |
| 6043114 | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device | Hiroto Kawagoe, Shogo Kiyota, Norio Suzuki, Eiichi Yamada, Yuji Sugino +4 more | 2000-03-28 |
| 4258465 | Method for fabrication of offset gate MIS device | Tokumasa Yasui, Minoru Fukuda | 1981-03-31 |