Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4876646 | Data processor having multilevel address translation tables | Shizuo Gotou, Toyohiko Kagimasa | 1989-10-24 |
| 4868740 | System for processing data with multiple virtual address and data word lengths | Toyohiko Kagimasa, Yoshiki Matsuda, Kikuo Takahashi | 1989-09-19 |
| 4851989 | Data processing apparatus with a virtual storage address boundary check circuit | Toyohiko Kagimasa, Kikuo Takahashi, Yoshie Ono | 1989-07-25 |
| 4679140 | Data processor with control of the significant bit lengths of general purpose registers | Shizuo Gotou, Toyohiko Kagimasa, Yooichi Shintani | 1987-07-07 |