Issued Patents All Time
Showing 51–75 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5225009 | Procedure for manufacturing cutting material of superior toughness | Yousuke Orikasa, Masahiro Yokomizo, Sadao Shimizu, Yukio Kawaoka, Hiro Ohzeki | 1993-07-06 |
| 4958276 | Single chip processor | Atsushi Kiuchi, Jun Ishida, Tetsuya Nakagawa, Yoshimune Hagiwara, Takashi Akazawa +1 more | 1990-09-18 |
| 4910466 | Selecting means for selecting a plurality of information | Atsushi Kiuchi, Jun Ishida, Tetsuya Nakagawa, Tomoru Sato, Shigeki Masumura +2 more | 1990-03-20 |
| 4885628 | Semiconductor integrated circuit device | Yasuo Nagai, Isao Shimizu, Masatoshi Kimura, Takeaki Okabe, Koozoo Sakamoto | 1989-12-05 |
| 4821187 | Processor capable of executing one or more programs by a plurality of operation units | Hirotada Ueda, Hitoshi Matsushima, Yoshimune Hagiwara | 1989-04-11 |
| 4809206 | Information processing apparatus | Atsushi Kiuchi, Jun Ishida, Tetsuya Nakagawa, Yoshimune Hagiwara, Hirotada Ueda | 1989-02-28 |
| 4752905 | High-speed multiplier having carry-save adder circuit | Tetsuya Nakagawa, Yoshimune Hagiwara, Hitoshi Matsushima, Hirotada Ueda | 1988-06-21 |
| 4745581 | LSI system of a structure requiring no additional address signals to incorporate additional status registers into the system | Tomoru Sato, Hirotada Ueda, Yoshimune Hagiwara, Hitoshi Matsushima, Tetsuya Nakagawa +1 more | 1988-05-17 |
| 4740923 | Memory circuit and method of controlling the same | Jun Ishida, Yoshimune Hagiwara, Hitoshi Matsushima, Hirotada Ueda | 1988-04-26 |
| 4722004 | Video signal discriminating apparatus | Fumitaka Miyamoto | 1988-01-26 |
| 4681438 | Automatic compensator for compensating collimation error due to two-directional inclination in surveying instruments | — | 1987-07-21 |
| 4630231 | Control program signal demodulating device | Atsumi Hirata, Shunichi Shichijo, Toyotaka Machida, Tatsuya Shinyagaito | 1986-12-16 |
| 4606289 | Sewing thread cutting device | Kazumasa Hara, Masashi Sato, Mikio Koike | 1986-08-19 |
| 4589096 | IIL semiconductor memory including arrangement for preventing information loss during read-out | Takahiro Okabe, Minoru Nagata | 1986-05-13 |
| 4543499 | I.sup.2 L circuitry having operating current supplied by higher-voltage circuitry fabricated on same chip | Minoru Nagata, Makoto Furihata, Setsuo Ogura, Takahiro Okabe, Mitsuya Sato | 1985-09-24 |
| 4520394 | Horizontal scanning frequency multiplying circuit | — | 1985-05-28 |
| 4496994 | Noise immune data regenerating circuit for video signal reproduction | — | 1985-01-29 |
| 4477842 | Data reproducing circuit | — | 1984-10-16 |
| 4476490 | Horizontal scanning frequency multiplying circuit | — | 1984-10-09 |
| 4453157 | Bi-phase space code data signal reproducing circuit | — | 1984-06-05 |
| 4433258 | Complementary Schottky transistor logic circuit | Takahiro Okabe, Minoru Nagata, Yutaka Okada | 1984-02-21 |
| 4432021 | Rotary recording medium reproducing apparatus | — | 1984-02-14 |
| 4429326 | I.sup.2 L Memory with nonvolatile storage | Tomoyuki Watanabe, Tohru Nakamura, Yutaka Okada, Takahiro Okabe, Minoru Nagata +2 more | 1984-01-31 |
| 4400732 | PCM Signal extracting circuit | Yasuaki Watanabe | 1983-08-23 |
| 4370627 | Integrated injection logic amplifier and oscillator circuits | Takahiro Okabe | 1983-01-25 |