Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5774702 | Integrated circuit having function blocks operating in response to clock signals | Naoki Mitsuishi, Koichi Hashimura | 1998-06-30 |
| 5666302 | Simultaneous bidirectional transmission apparatus for transmitting and receiving differential signals | Akira Tanaka, Akira Yamagiwa, Takehisa Hayashi | 1997-09-09 |
| 5621774 | Method and apparatus for synchronizing parallel data transfer | Akira Tanaka, Akira Yamagiwa, Takehisa Hayashi | 1997-04-15 |
| 5544340 | Method and system for controlling cache memory with a storage buffer to increase throughput of a write operation to the cache memory | Toshio Doi, Takehisa Hayashi, Takeshi Takemoto | 1996-08-06 |
| 5457348 | High-current integrated circuit with wiring for minimized on-resistance | Naoto Fujishima | 1995-10-10 |
| 5261082 | Semiconductor integrated circuit having a plurality of oscillation circuits | Takashi Ito, Kenzo Funatsu, Naoki Yashiki, Katsumi Iwata | 1993-11-09 |
| 5223733 | Semiconductor integrated circuit apparatus and method for designing the same | Toshio Doi, Takehisa Hayashi, Mitsuo Asai | 1993-06-29 |
| 5165010 | Information processing system | Noboru Masuda, Moritoshi Yasunaga, Minoru Yamada, Akira Masaki, Mitsuo Asai +4 more | 1992-11-17 |
| 5087829 | High speed clock distribution system | Takehisa Hayashi, Toshio Doi, Mitsuo Asai, Noboru Masuda, Akira Yamagiwa +1 more | 1992-02-11 |
| 5065048 | Semiconductor logic circuit with noise suppression circuit | Mitsuo Asai, Takehisa Hayashi, Toshio Doi | 1991-11-12 |
| 5043990 | Semiconductor integrated circuit device | Toshio Doi, Takehisa Hayashi | 1991-08-27 |
| 4950925 | Pre-charge circuit with a bipolar transistor | Toshio Doi, Takehisa Hayashi | 1990-08-21 |
| 4849660 | BICMOS output interface circuit for level-shifting ECL to CMOS | Takehisa Hayashi, Toshio Doi | 1989-07-18 |
| 4723082 | Signal transfer circuit for use in laminated multilayer electric circuit | Michio Asano, Akira Masaki, Masaru Osani, Minoru Yamada, Noboru Masuda | 1988-02-02 |
| 4719369 | Output circuit having transistor monitor for matching output impedance to load impedance | Michio Asano, Akira Masaki | 1988-01-12 |
| 4584391 | Method for the preparation of isosorbide-5-nitrate and sodium isosorbide-5-nitrate hydrate as a precursor thereof | Toshio Itoh, Susumu Ishiguro, Fumitake Shimada | 1986-04-22 |