Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8078818 | Method and system for migrating memory segments | William J. Walker, James Yu, Kenneth A. Jansen, Vasileios Balabanos, Andrew D. Olsen +1 more | 2011-12-13 |
| 7139965 | Bus device that concurrently synchronizes source synchronous data while performing error detection and correction | Prashantha Kalluraya | 2006-11-21 |
| 7111105 | System to optimally order cycles originating from a single physical link | Ryan J. Hensley, Jaideep Dastidar | 2006-09-19 |
| 7028116 | Enhancement of transaction order queue | — | 2006-04-11 |
| 7000060 | Method and apparatus for ordering interconnect transactions in a computer system | Ryan J. Hensley | 2006-02-14 |
| 6959398 | Universal asynchronous boundary module | Prashantha Kalluraya | 2005-10-25 |
| 6941407 | Method and apparatus for ordering interconnect transactions in a computer system | Ryan J. Hensley, Randall Pascarella | 2005-09-06 |
| 6901467 | Enhancing a PCI-X split completion transaction by aligning cachelines with an allowable disconnect boundary's ending address | Timothy K. Waldrop | 2005-05-31 |
| 6889283 | Method and system to promote arbitration priority in a buffer queue | — | 2005-05-03 |
| 6782336 | Test outputs using an idle bus | — | 2004-08-24 |
| 6775758 | Buffer page roll implementation for PCI-X block read transactions | — | 2004-08-10 |
| 6615295 | Relaxed read completion ordering in a system using transaction order queue | — | 2003-09-02 |