Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7215581 | Triple redundant latch design with low delay time | Jonathan Lotz, Manuel F. Cabanas-Holmen | 2007-05-08 |
| 7179690 | High reliability triple redundant latch with voting logic on each storage node | Jonathan Lotz, Manuel F. Cabanas-Holmen | 2007-02-20 |
| 7054203 | High reliability memory element with improved delay time | Jonathan Lotz, Manuel F. Cabanas-Holmen | 2006-05-30 |
| 6937527 | High reliability triple redundant latch with voting logic on each storage node | Jonathan Lotz, Manuel F. Cabanas-Holmen | 2005-08-30 |
| 6930527 | Triple redundant latch design with storage node recovery | Manuel F. Cabanas-Holmen, Jonathan Lotz | 2005-08-16 |
| 6882201 | Triple redundant latch design using a fail-over mechanism with backup | Kenneth Koch, II, Manuel F. Cabanas-Holmen | 2005-04-19 |
| 6665698 | High speed incrementer/decrementer | Li Ching Tsai | 2003-12-16 |
| 6594772 | Clock distribution circuitry to different nodes on integrated circuit with clock coupling circuitry to maintain predetermined phase relation between output and input of adjacent nodes | Li Ching Tsai, Johnny Zhang | 2003-07-15 |