Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11604850 | In-memory full adder | Avidan Akerib | 2023-03-14 |
| 10534836 | Four steps associative full adder | Avidan Akerib | 2020-01-14 |
| 9484076 | Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features | Yoshi Sato, Hsin You S. Lee | 2016-11-01 |
| 9431079 | Systems and methods of memory and memory operation involving input latching, self-timing and/or other features | Yoshi Sato, Hsin You S. Lee | 2016-08-30 |
| 9159391 | Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features | Yoshi Sato, Hsin You S. Lee | 2015-10-13 |
| 8693236 | Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other features | Chenming W. Tung, Hsin You S. Lee | 2014-04-08 |
| 8593860 | Systems and methods of sectioned bit line memory arrays | Chenming W. Tung, Hsin You S. Lee | 2013-11-26 |