Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12038781 | Method and system for organizing programmable semiconductor device into multiple clock regions | Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Chienkuang Chen +3 more | 2024-07-16 |
| 11614770 | Methods and apparatus for organizing a programmable semiconductor device into multiple clock regions | Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Chienkuang Chen +3 more | 2023-03-28 |
| 11216022 | Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions | Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Chienkuang Chen +3 more | 2022-01-04 |
| 11095294 | Phase-locked loop and method for calibrating voltage-controlled oscillator therein | Qiming Wu, Qiang Zhou, Yunfeng Wang | 2021-08-17 |
| 9479190 | Successive approximation register-based analog-to-digital converter with increased time frame for digital-to-analog capacitor settling | Kexin Luo, Guofu Peng, Yu Shen, Gijung Ahn | 2016-10-25 |
| 9379752 | Compensation scheme for MHL common mode clock swing | Fei Song, Gyudong Kim, Chwei-Po Chew, Min-Kyu Kim | 2016-06-28 |
| 9225345 | Charge pump calibration for dual-path phase-locked loop | Baoli Tong, Fei Song, Xiaofeng Wang | 2015-12-29 |