Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12038781 | Method and system for organizing programmable semiconductor device into multiple clock regions | Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Diwakar Chopperla +3 more | 2024-07-16 |
| 11614770 | Methods and apparatus for organizing a programmable semiconductor device into multiple clock regions | Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Diwakar Chopperla +3 more | 2023-03-28 |
| 11216022 | Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions | Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Diwakar Chopperla +3 more | 2022-01-04 |
| 11157421 | System level integrated circuit chip | Jinghui Zhu, San-Ta Kow, Tun Jun Gao, Diwakar Chopperla, Ning Song | 2021-10-26 |
| 11043950 | Method and system for providing a configurable logic device having a programmable DSP block | Jianhua Liu | 2021-06-22 |
| 10003339 | General purpose interface circuit compatible with output of MIPI signals | Jinghui Zhu, Bin Gao | 2018-06-19 |
| 7003066 | Digital phase locked loop with phase selector having minimized number of phase interpolators | Antony Davies, Ling Wang | 2006-02-21 |
| 6999543 | Clock data recovery deserializer with programmable SYNC detect logic | Jayson Trinh, Kuang Chi, Mark Becker | 2006-02-14 |
| 6861868 | High speed interface for a programmable interconnect circuit | Om P. Agrawal, Jinghui Zhu, Kuang Chi | 2005-03-01 |
| 6661254 | Programmable interconnect circuit with a phase-locked loop | Om P. Agrawal, Jinghui Zhu, Kuang Chi | 2003-12-09 |
| 6650141 | High speed interface for a programmable interconnect circuit | Om P. Agrawal, Jinghui Zhu, Kuang Chi | 2003-11-18 |