Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
GA

Glen Anderson — 12 Patents

Google: 6 patents #4,427 of 22,993Top 20%
SDSequence Design: 3 patents #5 of 23Top 25%
Oracle: 2 patents #5,565 of 14,854Top 40%
Palo Alto, CA: #1,971 of 9,675 inventorsTop 25%
California: #51,404 of 386,348 inventorsTop 15%
Overall (All Time): #396,045 of 4,157,543Top 10%
12 Patents All Time
Glen Anderson has been granted 12 US patents while listed as an inventor at Google. The first was granted in 1995 and the most recent in September 2020. Glen Anderson ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Glen Anderson in Palo Alto, CA, US.

Patents per Year

Patents granted per year, 1995 to 2020Bar chart with a peak of 2 patents in 2003.peak 21995: 1 patents19951996: 1 patents19961999: 1 patents19992002: 1 patents20022003: 2 patents20032012: 1 patents20122016: 1 patents20162017: 2 patents20172018: 1 patents20182020: 1 patents2020

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10762422 Wide and deep machine learning models Tal Shaked, Rohan Anil, Hrishikesh Aradhye, Mustafa Ispir, Wei Chai +6 more 2020-09-01 $49,957,000
9934515 Content recommendation system using a neural network language model Michael Schuster 2018-04-03 $19,555,000
9608917 Systems and methods for achieving high network link utilization Steven Padgett, Junlan Zhou, Uday Ramakrishna Naik, Alok Kumar, Amin Vahdat +1 more 2017-03-28 $13,010,000
9535897 Content recommendation system using a neural network language model Michael Schuster 2017-01-03 $13,711,000
9391911 Congestion window modification Sivasankar Radhakrishnan 2016-07-12 $17,855,000
8244909 Method, apparatus and networking equipment for performing flow hashing using quasi cryptographic hash functions Peter Hanson 2012-08-14 $28,058,000
6574787 Method and apparatus for logic synthesis (word oriented netlist) 2003-06-03
6519755 Method and apparatus for logic synthesis with elaboration 2003-02-11
6493648 Method and apparatus for logic synthesis (inferring complex components) 2002-12-10
5956756 Virtual address to physical address translation of pages with unknown and variable sizes Yousef A. Khalidi, Stephen A. Chessin, Shing Kong, Charles E. Narad, Madhusudhan Talluri 1999-09-21 $84,680,000
5583980 Time-synchronized annotation method 1996-12-10
5479627 Virtual address to physical address translation cache that supports multiple page sizes Yousef A. Khalidi, Stephen A. Chessin, Shing Kong, Charles E. Narad, Madhusudhan Talluri 1995-12-26 $95,785,000