Issued Patents All Time
Showing 76–100 of 156 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4807193 | Semiconductor memory device with a detection circuit to detect word line potential | Takeo Takematsu, Kimiaki Sato, Takashi Horii, Nobumi Kodama, Makoto Yanagisawa +1 more | 1989-02-21 |
| 4803656 | Semiconductor memory device having redundancy circuit portion | — | 1989-02-07 |
| 4799196 | Semiconductor memory device comprising different type memory cells | — | 1989-01-17 |
| 4791610 | Semiconductor memory device formed of a SOI-type transistor and a capacitor | — | 1988-12-13 |
| 4791616 | Semiconductor memory device | Masao Taguchi | 1988-12-13 |
| 4788667 | Semiconductor memory device having nibble mode function | Masao Nakano | 1988-11-29 |
| 4787067 | Semiconductor dynamic memory device having improved refreshing | Masao Nakano, Kimiaki Sato, Nobumi Kodama | 1988-11-22 |
| 4773049 | Semiconductor memory device having improved access time for continuously accessing data | — | 1988-09-20 |
| 4771407 | Semiconductor integrated circuit having function for switching operational mode of internal circuit | Shigeki Nozaki, Masao Nakano, Kimiaki Sato, Hatsuo Miyahara, Nobumi Kodama +3 more | 1988-09-13 |
| 4769789 | Semiconductor memory device having serial data input and output circuit | Masaaki Noguchi, Junji Ogawa | 1988-09-06 |
| 4768193 | Semiconductor memory device having error correction function and incorporating redundancy configuration | — | 1988-08-30 |
| 4766573 | Semiconductor memory device with error correcting circuit | — | 1988-08-23 |
| 4760281 | Clock signal generating circuit | — | 1988-07-26 |
| 4758993 | Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays | — | 1988-07-19 |
| 4754313 | Semiconductor memory device having stacked-capacitor type memory cells | Tomio Nakano, Masao Nakano, Kimiaki Sato | 1988-06-28 |
| 4752914 | Semiconductor integrated circuit with redundant circuit replacement | Masao Nakano, Tomio Nakano, Takeo Tatematsu, Junji Ogawa, Takashi Horii +5 more | 1988-06-21 |
| 4745577 | Semiconductor memory device with shift registers for high speed reading and writing | Junji Ogawa | 1988-05-17 |
| 4744061 | Dynamic semiconductor memory device having a simultaneous test function for divided memory cell blocks | Kimiaki Sato, Masao Nakano, Tomio Nakano | 1988-05-10 |
| 4742486 | Semiconductor integrated circuit having function for switching operational mode of internal circuit | Shigeki Nozaki, Masao Nakano, Kimiaki Sato, Nobumi Kodama | 1988-05-03 |
| 4740926 | Semiconductor memory device | Masao Nakano, Kimiaki Sato, Nobumi Kodama | 1988-04-26 |
| 4716549 | Semiconductor memory device having a circuit for compensating for discriminating voltage of memory cells | Masao Nakano, Tomio Nakano, Shigeki Nozaki, Kimiaki Sato, Nobumi Kodama | 1987-12-29 |
| 4707811 | Semiconductor memory device having extended period for outputting data | Tomio Nakano, Masao Nakano, Kimiaki Sato | 1987-11-17 |
| 4707806 | Semiconductor integrated circuit device having fuse-type information storing circuit | Tomio Nakano, Takeo Tatematsu, Junji Ogawa, Takashi Horii, Yasuhiro Fujii +2 more | 1987-11-17 |
| 4704706 | Booster circuit | Masao Nakano, Kimiaki Sato, Nobumi Kodama | 1987-11-03 |
| 4692689 | FET voltage reference circuit with threshold voltage compensation | — | 1987-09-08 |