Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5202849 | Dynamic semiconductor memory device | — | 1993-04-13 |
| 5119335 | Semiconductor static memory device | — | 1992-06-02 |
| 4970693 | Semiconductor memory device with internal control signal based upon output timing | Tsuyoshi Ohira, Masaru Satoh, Tomio Nakano, Yoshihiro Takemae | 1990-11-13 |
| 4771407 | Semiconductor integrated circuit having function for switching operational mode of internal circuit | Yoshihiro Takemae, Masao Nakano, Kimiaki Sato, Hatsuo Miyahara, Nobumi Kodama +3 more | 1988-09-13 |
| 4742486 | Semiconductor integrated circuit having function for switching operational mode of internal circuit | Yoshihiro Takemae, Masao Nakano, Kimiaki Sato, Nobumi Kodama | 1988-05-03 |
| 4739502 | Clock signal generating circuit for dynamic type semiconductor memory device | — | 1988-04-19 |
| 4716549 | Semiconductor memory device having a circuit for compensating for discriminating voltage of memory cells | Masao Nakano, Yoshihiro Takemae, Tomio Nakano, Kimiaki Sato, Nobumi Kodama | 1987-12-29 |
| 4602356 | Semiconductor memory device | Yoshihiro Takemae, Seiji Enomoto | 1986-07-22 |
| 4583204 | Semiconductor memory device | Yoshihiro Takemae, Tsuyoshi Ohira | 1986-04-15 |
| 4570088 | Semiconductor device for pulling down output terminal voltage | Tomio Nakano, Katsuhiko Kabashima | 1986-02-11 |
| 4550289 | Semiconductor integrated circuit device | Katsuhiko Kabashima, Yoshihiro Takemae, Tsuyoshi Ohira, Hatsuo Miyahara, Masakazu Kanai +1 more | 1985-10-29 |
| 4546457 | Semiconductor memory device | Yoshihiro Takemae | 1985-10-08 |
| 4535423 | Semiconductor memory device | Hatsuo Miyahara | 1985-08-13 |
| 4511997 | Semiconductor memory device | Yoshihiro Takemae, Tomio Nakano | 1985-04-16 |
| 4496850 | Semiconductor circuit for enabling a quick rise of the potential _on the word line for driving a clock signal line | Yoshihiro Takemae, Katsuhiko Kabashima, Seiji Enomoto | 1985-01-29 |
| 4482825 | Semiconductor device having a circuit for generating a voltage higher than a supply voltage and responsive to variations in the supply voltage | Yoshihiro Takemae, Katsuhiko Kabashima, Seiji Enomoto | 1984-11-13 |
| 4458337 | Buffer circuit | Yoshihiro Takemae, Tsutomu Mezawa, Katsuhiko Kabashima, Seiji Enomoto | 1984-07-03 |
| 4451908 | Address Buffer | Yoshihiro Takemae, Katsuhiko Kabashima, Seiji Enomoto, Tsutomu Mezawa | 1984-05-29 |
| 4447745 | Buffer circuit including a current leak circuit for maintaining the charged voltages | Yoshihiro Takemae, Seiji Enomoto, Tsutomu Mezawa, Katsuhiko Kabashima | 1984-05-08 |
| 4430581 | Semiconductor substrate bias circuit | Jun-ichi Mogi, Kiyoshi Miyasaka, Seiji Enomoto | 1984-02-07 |
| 4417329 | Active pull-up circuit | Tsutomu Mezawa, Katsuhiko Kabashima, Yoshihiro Takemae | 1983-11-22 |
| 4387448 | Dynamic semiconductor memory device with decreased clocks | Yoshihiro Takemae, Tsutomu Mezawa | 1983-06-07 |
| 4384348 | Method for testing semiconductor memory device | — | 1983-05-17 |