Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6604229 | Method of designing wiring for power sources in a semiconductor chip, and a computer product | Kenji Suzuki, Koji Banno, Toru Osajima, Takashi Yoneda, Koji Tsuneto +2 more | 2003-08-05 |
| 6405346 | Method for optimizing power supply wiring in a semiconductor integrated circuit | — | 2002-06-11 |
| 6405354 | Method and apparatus to optimize power wiring layout and generate wiring layout data for a semiconductor integrated circuit | Kazushige Itazu, Takayuki Matsuzawa | 2002-06-11 |
| 6247162 | Method and apparatus for generating layout data for a semiconductor integrated circuit device | Eiji Fujine, Hiroshi Yuyama, Masahito Isoda | 2001-06-12 |
| 5130573 | Semiconductor integrated circuit having ECL circuits and a circuit for compensating a capacitive load | Naomi Mori, Hideji Sumi | 1992-07-14 |