Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8689167 | Layout design apparatus and layout design method | Yuuki Watanabe | 2014-04-01 |
| 8539412 | Macro layout verification appartus | Sumiko Makino | 2013-09-17 |
| 8286117 | Macro layout verification apparatus to detect error when connecting macro terminal in LSI design layout | Sumiko Makino | 2012-10-09 |
| 8000951 | Timing analysis method and apparatus for enhancing accuracy of timing analysis and improving work efficiency thereof | — | 2011-08-16 |
| 7739638 | Circuit analyzing device, circuit analyzing method, program, and computer readable information recording medium considering influence of signal input to peripheral circuit which does not have logical influence | — | 2010-06-15 |
| 6434728 | Activation path simulation equipment and activation path simulation method | Eiji Furuta, Tadashi Konno | 2002-08-13 |