Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4888623 | Semiconductor device with PN junction isolation for TTL or ECL circuits | Yasushi Yasuda, Yoshiki Shimauchi, Akinori Tahara | 1989-12-19 |
| 4883975 | Schmitt trigger circuit | Hirofumi Dohgome, Masao Kumagai, Toru Nakamura, Kimitaka Yoshiyama | 1989-11-28 |
| 4774620 | Logic circuit | Yasushi Yasuda, Masao Kumagai, Akinori Tahara | 1988-09-27 |
| 4703202 | Two-stage gate circuit providing inverted and non-inverted outputs | Yasushi Yasuda, Akinori Tahara, Masao Kumagai | 1987-10-27 |
| 4680600 | Semiconductor device | Akinori Tahara, Yasushi Yasuda | 1987-07-14 |
| 4567380 | Schmitt trigger circuit | Yasushi Yasuda, Yoshiki Shimauchi, Akinori Tahara | 1986-01-28 |
| 4449063 | Logic circuit with improved switching | Hitoshi Ohmichi, Yasushi Yasuda, Yoshiharu Mitono, Taketo Imaizumi | 1984-05-15 |
| 4409495 | Schmitt trigger circuit with low input current | Yoshiharu Mitono, Yasushi Yasuda, Taketo Imaizumi, Hiroshi Ohta | 1983-10-11 |
| 4388755 | Structure for and method of manufacturing a semiconductor device by the master slice method | Yasushi Yasuda, Yoshiharu Mitono, Taketo Imaizumi, Hitoshi Ohmichi | 1983-06-21 |
| 4276556 | Semiconductor device | Yasushi Yasuda, Hitoshi Ohmichi, Yoshiharu Mitono | 1981-06-30 |