Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5668495 | BiCMOS reprogrammable logic | Burnell G. West | 1997-09-16 |
| 5570059 | BiCMOS multiplexers and crossbar switches | Burnell G. West | 1996-10-29 |
| 5406133 | BICMOS reprogrammable logic | Burnell G. West | 1995-04-11 |
| 5397943 | Clock distribution method and apparatus for high speed circuits with low skew using counterpropaging true and complement re-generated clock signals with predetermined ramp shapes | Burnell G. West | 1995-03-14 |
| 5355035 | High speed BICMOS switches and multiplexers | Burnell G. West | 1994-10-11 |
| 5340762 | Method of making small contactless RAM cell | — | 1994-08-23 |
| 5229307 | Method of making extended silicide and external contact | Gregory N. Burton, Ashok K. Kapoor | 1993-07-20 |
| 5227316 | Method of forming self aligned extended base contact for a bipolar transistor having reduced cell size | Greg Burton, Ashok K. Kapoor | 1993-07-13 |
| 5100824 | Method of making small contactless RAM cell | — | 1992-03-31 |
| 5072275 | Small contactless RAM cell | — | 1991-12-10 |
| 5063168 | Process for making bipolar transistor with polysilicon stringer base contact | — | 1991-11-05 |
| 5061986 | Self-aligned extended base contact for a bipolar transistor having reduced cell size and improved electrical characteristics | Greg Burton, Ashok K. Kapoor | 1991-10-29 |
| 5055418 | Process for fabricating complementary contactless vertical bipolar transistors | — | 1991-10-08 |
| 5014107 | Process for fabricating complementary contactless vertical bipolar transistors | — | 1991-05-07 |
| 4974046 | Bipolar transistor with polysilicon stringer base contact | — | 1990-11-27 |
| 4908679 | Low resistance Schottky diode on polysilicon/metal-silicide | Hemraj K. Hingarh | 1990-03-13 |
| 4829363 | Structure for inhibiting dopant out-diffusion | Michael E. Thomas, Ashok K. Kapoor | 1989-05-09 |
| 4764480 | Process for making high performance CMOS and bipolar integrated devices on one substrate with reduced cell size | — | 1988-08-16 |
| 4757027 | Method for fabricating improved oxide defined transistors | — | 1988-07-12 |
| 4640004 | Method and structure for inhibiting dopant out-diffusion | Michael E. Thomas, Ashok K. Kapoor | 1987-02-03 |
| 4628339 | Polycrystalline silicon Schottky diode array | Hemraj K. Hingarh | 1986-12-09 |
| 4624863 | Method of fabricating Schottky diodes and electrical interconnections in semiconductor structures | — | 1986-11-25 |
| 4622575 | Integrated circuit bipolar memory cell | William H. Herndon | 1986-11-11 |
| 4617071 | Method of fabricating electrically connected regions of opposite conductivity type in a semiconductor structure | — | 1986-10-14 |
| 4584594 | Logic structure utilizing polycrystalline silicon Schottky diodes | Hemraj K. Hingarh | 1986-04-22 |