Issued Patents All Time
Showing 51–75 of 106 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9697879 | Memory device with shared read/write circuitry | Chitra Subramanian | 2017-07-04 |
| 9691442 | Memory device with reduced on-chip noise | Thomas Andre, Dietmar Gogl | 2017-06-27 |
| 9679627 | Write verify programming of a memory device | Thomas Andre, Dimitri Houssameddine, Jon Slaughter, Chitra Subramanian | 2017-06-13 |
| 9601175 | Word line auto-booting in a spin-torque magnetic memory having local source lines | Thomas Andre | 2017-03-21 |
| 9583169 | Boosted supply voltage generator and method therefore | Dietmar Gogl, Thomas Andre, Halbert S. Lin | 2017-02-28 |
| 9575125 | Memory device with reduced test time | Thomas Andre, William Meadows | 2017-02-21 |
| 9569640 | Tamper detection and response in a memory device | Chitra Subramanian, Halbert S. Lin, Thomas Andre | 2017-02-14 |
| 9552863 | Memory device with sampled resistance controlled write voltages | Thomas Andre, Chitra Subramanian, Dietmar Gogl | 2017-01-24 |
| 9552849 | Memory device with timing overlap mode and precharge timing circuit | Thomas Andre, Halbert S. Lin | 2017-01-24 |
| 9543041 | Configuration and testing for magnetoresistive memory to ensure long term continuous operation | Jason Janesky, Dimitri Houssameddine, Mark Deherrera | 2017-01-10 |
| 9542989 | Circuit and method for controlling MRAM cell bias voltages | Dietmar Gogl, Thomas Andre | 2017-01-10 |
| 9530476 | Memory device with shared read/write circuitry | Chitra Subramanian | 2016-12-27 |
| 9529672 | ECC word configuration for system-level ECC compatibility | Thomas Andre | 2016-12-27 |
| 9529726 | Memory device with page emulation mode | Thomas Andre | 2016-12-27 |
| 9502093 | Method of writing to a spin torque magnetic random access memory | Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert S. Lin | 2016-11-22 |
| 9502089 | Short detection and inversion | Thomas Andre, Jon Slaughter, Dimitri Houssameddine | 2016-11-22 |
| 9454432 | Method of reading and writing to a spin torque magnetic random access memory with error correcting code | Thomas Andre, Matthew R. Croft | 2016-09-27 |
| 9443113 | Response to tamper detection in a memory device | Thomas Andre | 2016-09-13 |
| 9418001 | Memory controller and method for interleaving DRAM and MRAM accesses | Thomas Andre, Dietmar Gogl | 2016-08-16 |
| 9401195 | Self-referenced sense amplifier for spin-torque MRAM | Thomas Andre, Chitra Subramanian | 2016-07-26 |
| 9378796 | Method for writing to a magnetic tunnel junction device | Thomas Andre | 2016-06-28 |
| 9378798 | Method of writing to a spin torque magnetic random access memory | Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert S. Lin | 2016-06-28 |
| 9368181 | Circuit and method for accessing a bit cell in a spin-torque MRAM | Thomas Andre | 2016-06-14 |
| 9361964 | Boosted supply voltage generator for a memory device and method therefore | Dietmar Gogl, Thomas Andre, Halbert S. Lin | 2016-06-07 |
| 9336848 | Memory device with differential bit cells | Chitra Subramanian | 2016-05-10 |