Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12038948 | Identification and classification of sensitive information in data catalog objects | Sathesh Kumar Murthy, Harsha Madhusudhan | 2024-07-16 |
| 11797549 | Techniques for linking data to provide improved searching capabilities | Abhiram Gujjewar, Ganesh Seetharaman, Jai Motwani, Sayon Dutta, Rajat Mahajan +1 more | 2023-10-24 |
| 11748334 | Techniques for data asset discovery | Sathesh Kumar Murthy | 2023-09-05 |
| 11531675 | Techniques for linking data to provide improved searching capabilities | Abhiram Gujjewar, Ganesh Seetharaman, Jai Motwani, Sayon Dutta, Rajat Mahajan +1 more | 2022-12-20 |
| 10951212 | Self-timed processors implemented with multi-rail null convention logic and unate gates | Chao Xu, Ben Wiley Melton, Vidura Manu Wijayasekara, Bryan Cope, David Cureton Baker +1 more | 2021-03-16 |
| 10732700 | Self-timed clocked processor architecture | Paul Murtagh | 2020-08-04 |
| 10666268 | Real time clock with neural network correction of temperature-based changes in frequency | — | 2020-05-26 |
| 10248187 | Asynchronous processor | — | 2019-04-02 |
| 10205453 | Self-timed processors implemented with multi-rail null convention logic and unate gates | Chao Xu, Ben Wiley Melton, Vidura Manu Wijayasekara, Bryan Cope, David Cureton Baker +1 more | 2019-02-12 |
| 9423866 | Asynchronous processor that adjusts a respective operating voltage for causing a task to consume substantially all of a respective allocated time interval for the task | — | 2016-08-23 |
| 8898368 | Redriven/retimed registered dual inline memory module | Christopher Haywood | 2014-11-25 |
| 8275936 | Load reduction system and method for DIMM-based memory systems | Christopher Haywood, Chao Xu | 2012-09-25 |
| 7479799 | Output buffer with switchable output impedance | Dhruv Hemchand Jain | 2009-01-20 |
| 7408393 | Master-slave flip-flop and clocking scheme | Dhruv Hemchand Jain, Jeffrey C. Yen, Carl Pobanz | 2008-08-05 |
| 7307863 | Programmable strength output buffer for RDIMM address register | Jeffrey C. Yen, Nikhil K. Srivastava | 2007-12-11 |
| 6980021 | Output buffer with time varying source impedance for driving capacitively-terminated transmission lines | Nikhil K. Srivastava, Carl Pobanz | 2005-12-27 |
| 6750709 | Bipolar transistor-based linearizer with programmable gain and phase response system | Michael Case, Carl Pobanz | 2004-06-15 |
| 6621331 | Variable negative resistance cell for bipolar integrated circuits | Carl Pobanz | 2003-09-16 |
| 6441759 | Multi-bit &Dgr;&Sgr; modulator having linear output | Henrik T. Jensen | 2002-08-27 |
| 6362762 | Multiple mode analog-to-digital converter employing a single quantizer | Henrik T. Jensen | 2002-03-26 |
| 6288579 | Method to increase frequency of digital circuits | Michael Case | 2001-09-11 |
| 5952947 | Flexible and programmable delta-sigma analog signal converter | Howard S. Nussbaum, William P. Posey, Joseph J. Jensen | 1999-09-14 |
| 5859605 | Digital waveform generator and method for synthesizing periodic analog waveforms using table readout of simulated .DELTA.- .SIGMA. analog-to-digital conversion data | Joseph F. Jensen | 1999-01-12 |
| 5812020 | Positive current source | Joseph F. Jensen, Albert E. Cosand | 1998-09-22 |
| 5789994 | Differential nonlinear transmission line circuit | Michael Case | 1998-08-04 |