Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12367134 | Computer architecture with disaggregated memory and high-bandwidth communication interconnects | David Cureton Baker, Ari Novack, Donovan Scott Popps, Benjamin Wiley Melton, Mark A. Baur +1 more | 2025-07-22 |
| 12117930 | Computer architecture with disaggregated memory and high-bandwidth communication interconnects | David Cureton Baker, Ari Novack, Donovan Scott Popps, Benjamin Wiley Melton, Mark A. Baur +1 more | 2024-10-15 |
| 12099724 | Computer architecture with disaggregated memory and high-bandwidth communication interconnects | David Cureton Baker, Ari Novack, Donovan Scott Popps, Benjamin Wiley Melton, Mark A. Baur +1 more | 2024-09-24 |
| 10951212 | Self-timed processors implemented with multi-rail null convention logic and unate gates | Chao Xu, Gopal Raghavan, Ben Wiley Melton, Vidura Manu Wijayasekara, David Cureton Baker +1 more | 2021-03-16 |
| 10642759 | Interface from null convention logic to synchronous memory | Vidura Manu Wijayasekara, Ben Wiley Melton | 2020-05-05 |
| 10338930 | Dual-rail delay insensitive asynchronous logic processor with single-rail scan shift enable | Ben Wiley Melton | 2019-07-02 |
| 10205453 | Self-timed processors implemented with multi-rail null convention logic and unate gates | Chao Xu, Gopal Raghavan, Ben Wiley Melton, Vidura Manu Wijayasekara, David Cureton Baker +1 more | 2019-02-12 |
| 7752373 | System and method for controlling memory operations | — | 2010-07-06 |
| 6980056 | Multiple stage attenuator | Mark A. Alexander, Krishnan Subramonium, Golam Chowdhury, Kartika Prihadi | 2005-12-27 |
| 6912608 | Methods and apparatus for pipelined bus | Edward A. Wolff, David Eugene Baker, Edwin Franklin Barry | 2005-06-28 |
| 6259957 | Circuits and methods for implementing audio Codecs and systems using the same | Mark A. Alexander, Krishnan Subramonium, Golam Chowdhury, Kartika Prihadi | 2001-07-10 |