Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10394988 | Majority logic synthesis | Pierre-Emmanuel Gaillardon, Luca Gaetano Amaru | 2019-08-27 |
| 10380309 | Boolean logic optimization in majority-inverter graphs | Luca Gaetano Amaru, Pierre-Emmanuel Gaillardon | 2019-08-13 |
| 10348306 | Resistive random access memory based multiplexers and field programmable gate arrays | Pierre-Emanuel Gaillardon, Xifan Tang, Gain KIM, Edouard Giacomin | 2019-07-09 |
| 9971862 | Pattern-based FPGA logic block and clustering algorithm | Xifan Tang, Pierre-Emmanuel Gaillardon | 2018-05-15 |
| 9685959 | Method for speeding up boolean satisfiability | Luca Gaetano Amaru, Pierre-Emmanuel Gaillardon | 2017-06-20 |
| 9412940 | Resistive switching element and use thereof | Davide Sacchetto, Shashi Kanth Bobba, Pierre-Emmanuel Gaillardon, Yusuf Leblebici, Tugba Demirci | 2016-08-09 |
| 9276573 | High-performance low-power near-Vt resistive memory-based FPGA | Pierre-Emmanuel Gaillardon, Xifan Tang | 2016-03-01 |
| 9252252 | Ambipolar silicon nanowire field effect transistor | Yusuf Leblebici, Michele De Marchi, Davide Sacchetto | 2016-02-02 |
| 9130568 | Controllable polarity FET based arithmetic and differential logic | Luca Gaetano Amaru, Pierre-Emmanuel Gaillardon | 2015-09-08 |
| 8042087 | Method to design network-on-chip (NOC)-based communication systems | Srinivasan Murali, Luca Benini | 2011-10-18 |
| 7995599 | Method to manage the load of peripheral elements within a multicore system | Federico Angiolini, David Atienza Alonso | 2011-08-09 |
| 6467075 | Resolution of dynamic memory allocation/deallocation and pointers | Koichi Sato, Lcu Semeria | 2002-10-15 |