Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8832608 | Retiming-based design flow for delay recovery on inter-die paths in 3D ICs | Krishnendu Chakrabarty | 2014-09-09 |
| 8782479 | Scan test of die logic in 3D ICs using TSV probing | Krishnendu Chakrabarty | 2014-07-15 |
| 8775108 | Method and architecture for pre-bond probing of TSVs in 3D stacked integrated circuits | Krishnendu Chakrabarty | 2014-07-08 |