Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9142960 | Constraint weighted regulation of DC/DC converters | Sam B. Sandbote | 2015-09-22 |
| 9106105 | Regulation of inverter DC input voltage in photovoltaic arrays | Shawn R. McCaslin, Sam B. Sandbote | 2015-08-11 |
| 8975783 | Dual-loop dynamic fast-tracking MPPT control method, device, and system | Sam B. Sandbote | 2015-03-10 |
| 8970068 | Pseudo-random bit sequence generation for maximum power point tracking in photovoltaic arrays | Shawn R. McCaslin | 2015-03-03 |
| 8716999 | Dynamic frequency and pulse-width modulation of dual-mode switching power controllers in photovoltaic arrays | — | 2014-05-06 |
| 5818272 | Digital integration gain reduction method | — | 1998-10-06 |
| 5767713 | Phase locked loop having integration gain reduction | — | 1998-06-16 |
| 5640523 | Method and apparatus for a pulsed tri-state phase detector for reduced jitter clock recovery | — | 1997-06-17 |
| 5592125 | Modified bang-bang phase detector with ternary output | — | 1997-01-07 |
| 5502405 | Method and apparatus for CML/EC to CMOS/TTL translators | — | 1996-03-26 |
| 5355097 | Potentiometric oscillator with reset and test input | Paul H. Scott | 1994-10-11 |
| 5298810 | BiCMOS CMOS/ECL data multiplexer | Paul H. Scott | 1994-03-29 |
| 5015970 | Clock recovery phase lock loop having digitally range limited operating window | Ronald L. Treadway | 1991-05-14 |
| 4678944 | Circuit for improving performance of an ECL-to-TTL translator | — | 1987-07-07 |
| 4639661 | Power-down arrangement for an ECL circuit | Stanley Wilson | 1987-01-27 |
| 4626771 | ECL slave reference generator | — | 1986-12-02 |