Issued Patents All Time
Showing 101–125 of 319 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8583857 | Method and system for object-oriented data storage | Xueshi Yang | 2013-11-12 |
| 8583981 | Concatenated codes for holographic storage | Nedeljko Varnica, Gregory Burd, Seo-How Low, Lingyan Sun | 2013-11-12 |
| 8578251 | Power saving area-efficient hybrid BCH coding system | Heng Tang, Gregory Burd | 2013-11-05 |
| 8578248 | Adaptive systems and methods for storing and retrieving data to and from memory cells | Xueshi Yang | 2013-11-05 |
| 8566664 | System and method for correcting errors in non-volatile memory using products codes | Pantas Sutardja | 2013-10-22 |
| 8565353 | Unfolded decision-directed loop, architectures, apparatuses and systems including the same, and methods, algorithms and software for reducing latency in decision-directed loops | Michael Madden | 2013-10-22 |
| 8555117 | Defect detector for holographic storage systems | Shaohua Yang | 2013-10-08 |
| 8543886 | Parity insertion for inner architecture | Panu Chaichanavong, Gregory Burd | 2013-09-24 |
| 8539195 | Non-volatile memory device with non-evenly distributable data access | Lau Nguyen, Pantas Sutardja, Chi Kong Lee, Tony Yoon | 2013-09-17 |
| 8527850 | Architecture and control of reed-solomon error identification and evaluation | Ichiro Kikuchi, Siu-Hung Fred Au, Gregory Burd, Jun Xu, Tony Yoon | 2013-09-03 |
| 8521976 | Method and system for improving disk drive performance | — | 2013-08-27 |
| 8522123 | Iterative decoder memory arrangement | Engling Yeo, Panu Chaichanavong, Nedeljko Varnica, Gregory Burd | 2013-08-27 |
| 8516332 | Methods and algorithms for joint channel-code decoding of linear block codes | Gregory Burd | 2013-08-20 |
| 8495442 | Circuits, architectures, apparatuses, systems, algorithms, software and firmware for using reserved cells to indicate defect positions | Pantas Sutardja | 2013-07-23 |
| 8489977 | Low-density parity check codes for holographic storage | Nedeljko Varnica, Seo-How Low, Gregory Burd | 2013-07-16 |
| 8489960 | LDPC codes and expansion method | Adina Matache, Heng Tang, Gregory Burd, Aditya Ramamoorthy, Jun Xu | 2013-07-16 |
| 8484531 | Post-processing decoder of LDPC codes for improved error floors | Nedeljko Varnica, Gregory Burd | 2013-07-09 |
| 8484527 | Systems and methods for achieving higher coding rate using parity interleaving | Heng Tang, Gregory Burd, Panu Chaichanavong | 2013-07-09 |
| 8484537 | Systems and methods for data-path protection | Tang Heng, Gregory Burd, Soichi Isono, Son Hong Ho, Vincent Wong | 2013-07-09 |
| 8473812 | Method and system for error correction in flash memory | Aditya Ramamoorthy, Pantas Sutardja | 2013-06-25 |
| 8473806 | Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter | Farshid Rafiee Rad, Nedeljko Varnica | 2013-06-25 |
| 8464119 | Defect recovery for iteratively-decoded data channel | Shaohua Yang, Nedeljko Varnica, Nitin Nangare | 2013-06-11 |
| 8462897 | Nonlinear detectors for channels with signal-dependent noise | Hongxin Song, Seo-How Low, Panu Chaichanavong | 2013-06-11 |
| 8458573 | High-speed interface for read channel | Seo-How Low | 2013-06-04 |
| 8458557 | Interleaved error correction coding for channels with non-uniform signal-to-noise ratios | Nedeljko Varnica, Gregory Burd | 2013-06-04 |