| 10031181 |
Integrated circuit package receiving test pattern and corresponding signature pattern |
— |
2018-07-24 |
| 9726722 |
Systems and methods for automatic test pattern generation for integrated circuit technologies |
— |
2017-08-08 |
| 9093127 |
Method and apparatus for warming up integrated circuits |
— |
2015-07-28 |
| 8829898 |
Method and apparatus for testing |
Asaf Idan, Ofer Benjamin, Eli Kurin |
2014-09-09 |
| 8661223 |
Buffer management architecture |
Sorel Horovitz |
2014-02-25 |
| 8615688 |
Method and system for iteratively testing and repairing an array of memory cells |
Reshef Bar Yoel, Michael Levi, Yosef Haviv |
2013-12-24 |
| 8572412 |
Method and apparatus for warming up integrated circuits |
— |
2013-10-29 |
| 8526255 |
Method and apparatus for memory test |
Ofir Keren |
2013-09-03 |
| 8423839 |
Memory repair system and method |
Reshef Bar Yoel, Michael Levi, Yosef Haviv |
2013-04-16 |
| 8208326 |
Method and apparatus for memory test |
Ofir Keren |
2012-06-26 |
| 8176291 |
Buffer management architecture |
Sorel Horovitz |
2012-05-08 |
| 8176388 |
System and method for soft error scrubbing |
Michael Moshe, Amit Avivi, Aron Wohlgemuth |
2012-05-08 |
| 8051348 |
Integrated circuit testing using segmented scan chains |
— |
2011-11-01 |
| 7984358 |
Error-correction memory architecture for testing production errors |
Eitan Joshua |
2011-07-19 |
| 7949908 |
Memory repair system and method |
Reshef Bar Yoel, Michael Levi, Yosef Haviv |
2011-05-24 |
| 7886207 |
Integrated circuit testing using segmented scan chains |
— |
2011-02-08 |
| 7730341 |
System and method for transitioning from a logical state to any other logical state by modifying a single state element |
— |
2010-06-01 |
| 7689793 |
Buffer management architecture |
Sorel Horovitz |
2010-03-30 |
| 7539915 |
Integrated circuit testing using segmented scan chains |
— |
2009-05-26 |
| 7478308 |
Error-correction memory architecture for testing production |
Eitan Joshua |
2009-01-13 |
| 7206988 |
Error-correction memory architecture for testing production errors |
Eitan Joshua |
2007-04-17 |
| 6988237 |
Error-correction memory architecture for testing production errors |
Eitan Joshua |
2006-01-17 |
| 6829245 |
Head of line blocking |
Eitan Medina, David Shemla |
2004-12-07 |
| 5790891 |
Synchronizing unit having two registers serially connected to one clocked elements and a latch unit for alternately activating the registers in accordance to clock signals |
Doron Shefert, David Shemla, Eyal Waldman |
1998-08-04 |
