Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5047358 | Process for forming high and low voltage CMOS transistors on a single integrated circuit chip | Walter K. Kosiak, Douglas R. Schnabel, Jonathan Mann, Jack D. Parrish | 1991-09-10 |
| 4918026 | Process for forming vertical bipolar transistors and high voltage CMOS in a single integrated circuit chip | Walter K. Kosiak, Douglas R. Schnabel, Jonathan Mann, Jack D. Parrish | 1990-04-17 |