Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7730437 | Method of full semiconductor chip timing closure | Purushothaman Ramakrishnan, Pattikad Narayanan Ravindran, Chirakkal Varriam Unnikrishnan | 2010-06-01 |
| 7392495 | Method and system for providing hybrid clock distribution | Nagendra Srinivas Cherukupalli | 2008-06-24 |
| 7036037 | Multi-bit deskewing of bus signals using a training pattern | Somnath Paul | 2006-04-25 |
| 6553549 | Static timing analysis with simulations on critical path netlists generated by static timing analysis tools | Shiva P. Gowni | 2003-04-22 |
| 6400642 | Memory architecture | Pidugu L. Narayana | 2002-06-04 |
| 6240031 | Memory architecture | Pidugu L. Narayana | 2001-05-29 |